CPU Utilization Metering on Multi-Threaded Cores
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Solution Overview
Problem
Current operating systems inaccurately measure CPU utilization on multi-threaded cores due to performance interference between threads, leading to flawed indications of system throughput and available headroom, which can result in overprovisioning and management challenges.
Innovation Solution
A method to measure and report CPU utilization by combining active thread information with the core's ability to increase throughput by utilizing additional threads, using performance counters and corrective functions to accurately determine idle times and cycles per instruction, thereby providing a more accurate representation of system and core usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple hardware threads are executed concurrently on a single processor core, then total throughput per core is improved, but measurement precision of CPU utilization deteriorates due to performance interference between threads
Solution Approach 1:
The patent segments the measurement approach by introducing a new hierarchical level: core-level utilization measurement. Instead of measuring only at the hardware thread level (which becomes inaccurate due to interference), the system segments the measurement function to operate at the core level where threads are aggregated. This allows the benefits of multithreading for throughput while providing accurate utilization metrics at the core level where interference effects are captured and accounted for.
Solution Approach 2:
The patent introduces core-level utilization metrics as an intermediary between hardware thread execution and system-wide utilization reporting. This intermediary measurement layer at the core level mediates the conflicting requirements by providing a consolidated view that reflects actual core usage without being corrupted by thread-level interference, thereby enabling accurate capacity planning and load balancing decisions.
2Ease of operation
If CPU utilization is measured independently for each hardware thread, then ease of operation for monitoring is improved, but reliability of utilization indication deteriorates due to thread interference effects
Solution Approach 1:
The patent merges the utilization measurements from multiple hardware threads at the core level. By combining thread-level metrics into core-level metrics, the system maintains the operational simplicity of individual thread monitoring while eliminating the reliability issues caused by measuring interfering threads independently. The merge operation aggregates the individual thread utilizations into a unified core utilization metric that reflects actual resource consumption.
3Device complexity
If traditional CPU utilization metrics are used on multithreaded cores, then device complexity is reduced, but loss of information about actual system capacity increases
Solution Approach 1:
The patent adds a new dimensional level to the monitoring hierarchy by introducing core-level metrics above the traditional hardware thread level. This dimensional change allows the system to maintain simple thread-level monitoring operations while adding core-level aggregation that preserves complete information about actual system capacity. The additional dimension enables both simplicity and accuracy to coexist by operating at different hierarchical levels.
Data Source
AI summary
Indicating usage in a system includes implementing a performance counter associated with one or more hardware threads; counting events associated with the one or more hardware threads to determine an event count; deriving an initial measure of usage of a processor core associated with the one or more hardware threads based at least in part on the event count; applying a corrective function to modify the initial measure of usage and determine a modified measure of usage, wherein the modified measure of usage has a value that is different from and not equivalent to the initial measure of usage; and outputting an indication of a processor usage, the indication being based at least in part on the modified measure of usage.


