CPU Overcurrent Protection via Dynamic Frequency Dithering

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Solution Overview

Problem

As CPU performance increases, so does power consumption, leading to potential overcurrent situations that can cause system failure, necessitating a fast and autonomous protection mechanism to prevent excessive power consumption and heat generation.

Innovation Solution

An OC protect controller monitors CPU power consumption and triggers a two-stage mechanism involving clock-gating and PLL frequency reduction to prevent overcurrent, using frequency dithering and voltage control to maintain system efficiency within specified limits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If CPU performance is increased to improve processing speed, then CPU operating frequency is increased, but power consumption and overcurrent risk increase

Engineering Contradiction:

ImproveCPU operating frequencyVSAvoidCPU power consumption

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic frequency adjustment by introducing a frequency dithering mechanism that continuously modulates the CPU operating frequency around a target value. This dynamic control allows the system to respond to changing power consumption conditions in real-time, preventing overcurrent events while maintaining optimal performance when possible

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent employs a feedback control system where the frequency dithering controller monitors CPU power consumption and PLL lock status, then adjusts the CPU operating frequency accordingly. The feedback loop ensures that frequency adjustments maintain both power safety and system stability

Inventive Principle:

Principle #23Feedback

2Reliability

If frequency dithering control is applied to reduce CPU frequency quickly, then overcurrent protection is improved, but system efficiency decreases due to PLL reconfiguration latency

Engineering Contradiction:

Improveovercurrent protectionVSAvoidPLL reconfiguration latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by proactively reducing CPU frequency through frequency dithering before overcurrent conditions develop. The system monitors power consumption trends and preemptively adjusts frequency to prevent OC events, rather than reacting after the problem occurs

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses partial action by implementing frequency dithering that oscillates around a target frequency rather than making extreme frequency changes. This approach provides sufficient overcurrent protection while minimizing performance degradation and avoiding excessive frequency reductions that would unnecessarily impact system efficiency

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS10275010B2Fast and Autonomous mechanism for CPU OC protection

Publication Date: 2019.04.30 MEDIATEK SINGAPORE PTE LTD

AI summary

A method of detecting and preventing over current induced system failure is provided. An OC protect controller monitors a CPU total power consumption based on received CPU activity information. In response to the monitoring, if the CPU power consumption is over a threshold, then the OC protect controller outputs a frequency dithering control signal to reduce the CPU clock frequency such that the CPU does not reach an OC limit. The OC protect controller also outputs a PLL frequency control signal to reduce the PLL clock frequency to improve system efficiency.