CPU Port Runtime Recovery for Uncorrectable Link Errors

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Solution Overview

Problem

Current CPU link recovery methods require a full platform reset and cannot be performed during runtime, leading to system crashes and data loss when uncorrectable errors occur.

Innovation Solution

Implementing a link recovery system that monitors CPU port performance, predicts impending uncorrectable errors, and triggers link recovery during runtime using PCIe link training and TX EQ Adaptation to maintain transaction completion without resets.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a full platform reset is performed to recover from uncorrectable errors, then system reliability is improved, but system availability and productivity deteriorate due to complete system shutdown

Engineering Contradiction:
Improvesystem reliabilityVSAvoidsystem availability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the recovery process by isolating the faulty CPU link to a specific port level, allowing recovery of individual links without resetting the entire platform. The system divides the recovery scope from full-platform to port-specific, enabling selective recovery that maintains overall system availability while addressing local failures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary error detection and prediction mechanisms that identify impending uncorrectable errors before they occur. By detecting performance degradation trends and predicting future failures, the system can initiate recovery procedures proactively, preventing complete link failure and avoiding the need for full platform resets.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If link recovery is performed during runtime, then system availability is improved, but system complexity increases due to additional monitoring and recovery mechanisms

Engineering Contradiction:
Improvesystem availabilityVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements self-service mechanisms where the system automatically monitors its own link health, detects errors, and performs recovery operations without external intervention. The CPU ports autonomously execute recovery procedures when errors are detected, reducing the need for complex external management systems while maintaining high availability.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent incorporates feedback mechanisms that continuously monitor link performance metrics and error rates. This feedback loop enables the system to dynamically adjust operations and trigger recovery procedures based on real-time conditions, allowing runtime recovery without requiring overly complex predetermined control systems.

Inventive Principle:
Principle #23Feedback

3Measurement precision

If CPU port performance is monitored in real-time, then error prediction accuracy is improved, but measurement and detection difficulty increases

Engineering Contradiction:
Improveerror prediction accuracyVSAvoiddetection complexity
Core Design Contradiction:
Measurement precisionVSDifficulty of detecting and measuring

Solution Approach 1:

The patent applies partial monitoring by focusing measurement efforts on specific critical parameters such as error rates and performance metrics that are most indicative of impending failures. Rather than attempting to measure all possible link characteristics, the system concentrates on key indicators that provide sufficient prediction accuracy with reduced measurement complexity.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12379982B2Methods and apparatus for runtime recovery of processor links
Publication Date: 2025.08.05 INTEL CORP
  • US12379982B2 patent drawing
  • US12379982B2 patent drawing
  • US12379982B2 patent drawing

AI summary

Methods, apparatus, systems, and articles of manufacture are disclosed that perform runtime recovery of processor links. An example non-transitory computer readable medium comprises instructions that, when executed, causes a machine to at least determine an onset of an error based on health of a central processor unit (CPU) port, calculate a figure of merit (FOM) yield for each of a plurality of adaptation tasks performed on a lane of the CPU port using a first preset coefficient of a plurality of preset coefficients, select a preset coefficient based on the calculated FOM, and trigger a link recovery mechanism, using the selected preset coefficient to initiate a link recovery process on the CPU port.