CPU Power-Saving Method for Continuous Display Without Frame Buffers
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Solution Overview
Problem
Modern computer systems face challenges in balancing power consumption with performance, especially in graphic-intensive applications that require continuous high-resolution image display without interruptions, as existing power-saving mechanisms can cause delays and increased costs due to the need for additional frame buffers.
Innovation Solution
A power-saving method that involves issuing a Power-saving related message and setting a Power-saving related flag to manage CPU clock speed and system resources dynamically, allowing for continuous image display on multiple devices during CPU non-responding periods without increasing system bandwidth or frame buffer requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power-saving mechanisms are implemented to reduce power consumption, then power consumption is reduced, but display continuity and timing precision deteriorate causing delays
Solution Approach 1:
The patent applies preliminary action by pre-loading image data into the display buffer before the CPU enters power-saving mode. The system determines upcoming display data in advance and stores it in the display buffer, ensuring that display operations can continue without interruption when the CPU is in a low-power state. This resolves the contradiction by preparing necessary data beforehand, maintaining display continuity while enabling power savings.
2Reliability
If additional frame buffers are added to maintain display continuity during power-saving mode, then display continuity is maintained, but system cost and complexity increase
Solution Approach 1:
The patent applies universality by making the existing display buffer serve multiple functions: it acts as both the normal display buffer for active mode operations and as a power-saving buffer when the CPU enters low-power state. The buffer management mechanism dynamically repurposes the same hardware resource for different functions based on system state, eliminating the need for separate frame buffers while maintaining display continuity during power-saving operations.
3Use of energy by moving object
If CPU clock speed is reduced for power-saving, then power consumption is reduced, but processing speed and performance deteriorate
Solution Approach 1:
The patent applies dynamics by implementing dynamic clock switching that adjusts the CPU clock frequency based on operational requirements. The system switches between a first clock frequency for normal operation and a second, lower clock frequency for power-saving operations. This dynamic adjustment allows the system to optimize between power consumption and processing speed in real-time, reducing power consumption during appropriate periods while maintaining high performance when needed.
Data Source
AI summary
A power-saving method of continuous display and effective cost in a system that includes memory directly accessed by a CPU and at least one display device within vertical blanking. The method includes the following steps: issuing a Power-saving related message; dropping the Power-saving related message, wherein a Power-saving related flag is not set; setting the Power-saving related flag; setting a VID/FID pending bit in the CPU, wherein the vertical blanking of the display/displays occurs and clearing the Power-saving related flag, wherein the Power-saving related flag is set, and executing a power saving process.