Multi-CPU Power Saving Mode Transition with Selective RAM Retention

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Solution Overview

Problem

In information processing apparatuses with multiple arithmetic units and storage units, existing methods fail to sufficiently reduce power consumption and shorten return time from a power saving mode to a normal operating mode, as they require power to be supplied to multiple storage devices during power saving, increasing consumption and prolonging return times due to data transfer delays.

Innovation Solution

An information processing apparatus with a first arithmetic unit executing a program on a first storage unit and a second arithmetic unit executing a program on a volatile second storage unit, where the second program is stored in a non-volatile storage unit during power saving mode transitions, and transferred back to the second storage unit upon returning to normal mode, allowing power reduction and faster return times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If electric power is supplied to multiple main storage devices to store main programs and required data during power saving mode, then the return time can be shortened, but power consumption in the power saving mode increases

Engineering Contradiction:
Improvereturn timeVSAvoidpower consumption in power saving mode
Core Design Contradiction:
Loss of timeVSUse of energy by stationary object

Solution Approach 1:

The patent divides the storage system into multiple independent storage devices, each capable of storing program data. During power saving mode, only one storage device is activated to store the second program, while other storage devices remain inactive. This segmentation allows the system to maintain short return times by having ready-to-use programs stored in non-volatile memory without requiring all storage devices to remain powered.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary actions by storing the second program in a non-volatile storage device before entering power saving mode. This advance preparation ensures that when the system returns from power saving mode, the program is already available in the storage device, eliminating the need to power on multiple storage devices and thus reducing both power consumption and return time.

Inventive Principle:
Principle #10Preliminary action

2Use of energy by stationary object

If data is transferred from auxiliary storage device to multiple main storage devices using hibernation function, then power consumption can be suppressed, but data transfer requires more time and return time is limited

Engineering Contradiction:
Improvepower consumptionVSAvoiddata transfer time
Core Design Contradiction:
Use of energy by stationary objectVSLoss of time

Solution Approach 1:

The patent extracts the second program from the auxiliary storage device and stores it in a non-volatile storage device that remains active or can be quickly activated. This extraction approach eliminates the need for time-consuming data transfer during resume operations, as the program is already positioned in the storage device before power saving mode begins, thus reducing return time while maintaining low power consumption.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If electric power is supplied to multiple main storage devices during operation, then all programs can be executed simultaneously, but power consumption increases

Engineering Contradiction:
Improvemulti-function execution capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent implements dynamic power management where the power supply state of storage devices changes based on operational requirements. During normal operation, multiple storage devices can be activated to support multi-function execution. When transitioning to power saving mode, the system dynamically deactivates unnecessary storage devices while keeping one storage device active to store the second program, thus balancing productivity and power consumption.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8806241B2Apparatus and method for shortening the time returning from a power-saving mode to normal power mode and reducing power consumption in the power-saving mode
Publication Date: 2014.08.12 CANON KK
  • US8806241B2 patent drawing
  • US8806241B2 patent drawing
  • US8806241B2 patent drawing

AI summary

In an information processing apparatus which incorporates a plurality of arithmetic units and a plurality of storage units, power consumption in a power saving mode is reduced, and a return time required to return from the power saving mode to a normal power mode is shortened. With this invention, in an information processing method in an information processing apparatus which incorporates a plurality of CPUs and a plurality of RAMs, when a condition required to transit to the power saving mode is satisfied, each CPU stores information associated with an operation state of an active program in one RAM, and turns off the power supply to devices except for the one RAM.