CPU Program Integrity Verification via Segmented Alteration Detection
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Solution Overview
Problem
In information processing apparatuses with multiple CPUs, existing methods fail to effectively verify and switch between different programs, particularly in ensuring that a CPU executes an unaltered program, as the reset vector setting can be altered by an external entity, compromising the integrity of the program execution.
Innovation Solution
A system-on-chip (SoC) architecture with a central processing unit (CPU) and read-only memory (ROM) that executes an alteration detection program first, using digital signatures and public key cryptography to verify program integrity, and then switches to execute other processing programs, ensuring the reset vector is set correctly to prevent execution of altered programs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a CPU executes an alteration verification program to verify program integrity, then system security is improved, but the operation complexity and time required for CPU activation increase
Solution Approach 1:
The verification system is segmented into distinct components: a verification CPU dedicated to executing alteration verification programs, and a processing CPU for executing processing programs. This segmentation allows each CPU to specialize in its function, reducing the operational complexity for each while maintaining comprehensive verification capability.
Solution Approach 2:
The alteration verification program is executed before the processing program during CPU activation. This preliminary verification action ensures program integrity is checked in advance, preventing execution of altered programs while establishing a clear sequence that reduces operational complexity.
2Reliability
If the reset vector is set to execute verification program first, then program integrity is ensured, but the activation time is extended
Solution Approach 1:
The reset vector is configured to automatically execute the alteration verification program before the processing program without requiring additional manual intervention or extending the perceived activation time. The verification occurs in the background during the normal activation sequence, ensuring program integrity while maintaining efficient timing.
3Productivity
If multiple CPUs execute different programs simultaneously, then processing capability is improved, but the difficulty of verifying program integrity increases
Solution Approach 1:
The system segments verification and processing functions into separate CPUs. The verification CPU executes alteration verification programs for each processing program, while processing CPUs execute their respective processing programs. This segmentation makes verification manageable despite multiple programs running simultaneously.
Solution Approach 2:
The verification CPU acts as an intermediary that verifies the integrity of processing programs before they are executed by processing CPUs. This intermediary verification step ensures that even with multiple different programs running simultaneously, each program's integrity can be individually verified without increasing overall detection difficulty.
Data Source
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AI summary
In an information processing apparatus, a second central processing unit (CPU) uses an alteration detection program stored in a second memory to perform alteration detection on a program to be executed at a time of activation of a first CPU stored in a first memory. In a case where no alteration is detected in the program to be executed at the time of activation, the second CPU activates the first CPU using the program to be executed at the time of activation, and uses the activated first CPU to switch a program to be executed by the second CPU from the alteration detection program stored in the second memory to another processing program stored in the first memory.