CPU SIMD Core for Tropological Feature Extraction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Implementing tropological feature extraction from digital images on existing systems is challenging due to high power consumption and Bill of Materials (BOM) costs associated with using Digital Signal Processor (DSP) cores, which require saturation logic and occupy more chip area.
Innovation Solution
The method involves implementing the tropological feature extraction algorithm on a Central Processing Unit (CPU) with Single Instruction Multiple Data (SIMD) instructions lacking saturation logic, reducing the BOM cost and power consumption by utilizing a single CPU core instead of a DSP core.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a DSP core with saturation logic built in the ISA is used for implementing tropological feature extraction, then the algorithm can be executed with built-in saturation logic, but the chip area and BOM cost increase significantly
Solution Approach 1:
The patent extracts the saturation logic functionality from the DSP core and implements it through software emulation on a CPU core. By removing the hardware saturation logic component, the chip area is significantly reduced while maintaining the algorithm's reliability through software-based saturation handling.
Solution Approach 2:
The patent replaces the expensive DSP core with a cheaper CPU core that lacks built-in saturation logic. The CPU core is a more cost-effective component, and the patent accepts that saturation logic must be implemented through software rather than hardware, achieving lower BOM cost while maintaining functional equivalence.
2Productivity
If a DSP core with saturation logic built in the ISA is used for implementing tropological feature extraction, then the algorithm can be executed efficiently, but the BOM cost increases
Solution Approach 1:
The patent extracts the saturation logic from hardware and implements it in software, allowing the use of a lower-cost CPU core instead of an expensive DSP core. This maintains algorithm execution efficiency while significantly reducing BOM cost through component substitution.
Solution Approach 2:
The patent replaces the expensive DSP core with a cheaper CPU core, accepting that saturation logic must be implemented through software emulation. This substitution achieves lower BOM cost while maintaining sufficient execution efficiency for tropological feature extraction.
3Ease of manufacture
If a CPU core with SIMD instructions lacking saturation logic is used instead of a DSP core, then the BOM cost is reduced, but achieving bit-exact results and power optimal solution becomes challenging
Solution Approach 1:
The patent implements feedback mechanisms in the software to correct and compensate for the lack of hardware saturation logic. By continuously monitoring and adjusting the computation results, the system achieves bit-exact precision despite using a CPU core without built-in saturation logic.
4Ease of manufacture
If a CPU core with SIMD instructions lacking saturation logic is used instead of a DSP core, then the BOM cost is reduced, but power consumption optimization becomes challenging
Solution Approach 1:
The patent implements dynamic power management techniques in the software, allowing the system to adjust its power consumption based on the specific computational requirements of tropological feature extraction. This enables power optimization on a CPU core without built-in saturation logic, achieving lower power consumption than expected while maintaining reduced BOM cost.
Data Source
AI summary
The present invention provides a system and method for extracting Tropological features from an image. The system (100) comprises CPU core with Single Instruction Multiple Data (SIMD) instruction set but the instructions lack saturation logic (101), wherein the software modules are implemented. Removing the logic hardware used to implement saturation in the SIMD instructions helps in lowering the BoM cost and the inventive steps helps in achieving bit-exact results without saturation logic. The power consumed using CPU without saturation logic in SIMD instruction is lesser than using Digital Signal Processing Instruction Set Architecture with saturation logic, thus giving value additions to platform SoC designers and makers for using low BoM cost solution.


