CPU Sleep Scheduling with Idle Prediction for Multi-Core Power Saving

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Solution Overview

Problem

Existing CPU power management techniques struggle to determine the optimal idle state for CPUs in a multi-core system, balancing power savings with entry/exit costs and performance latencies, leading to inefficient power consumption.

Innovation Solution

A system comprising a CPU scheduler, idle predictor, and CPU-idle framework categorizes CPUs into groups and uses algorithms to calculate cost efficiency ratios for determining whether to operate CPUs in sleep or normal mode based on IPI information, predicting idle periods, and optimizing power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If CPUs enter deeper idle state to save power, then power consumption is reduced, but entry/exit power cost increases and latency increases

Engineering Contradiction:
Improvepower consumptionVSAvoidlatency
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

The system dynamically adjusts the idle state depth based on real-time workload characteristics and historical patterns. The governor selectively transitions CPUs between different idle states (C1, C2, C3, etc.) rather than using a fixed deep idle state, optimizing the balance between power savings and wake-up latency for each specific scenario.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system performs preliminary analysis of workload patterns and predicts future CPU activity before making idle state decisions. By anticipating whether the CPU will be needed soon based on historical data and current workload trends, the system can avoid entering deep sleep states when wake-up is imminent, thereby reducing unnecessary latency.

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If CPUs enter deeper idle state to save power, then power consumption is reduced, but entry/exit power cost increases

Engineering Contradiction:
Improvepower savedVSAvoidentry/exit power
Core Design Contradiction:
Loss of energyVSUse of energy by stationary object

Solution Approach 1:

The system continuously monitors CPU workload patterns, idle duration, and power consumption metrics to provide feedback for optimizing idle state selection. The governor uses this feedback to learn from past decisions and adjust future idle state choices, maximizing power savings while minimizing the cumulative entry/exit power overhead.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system changes operational parameters by adjusting which idle state is selected based on multiple factors including predicted idle duration, current power state, and workload characteristics. Rather than always transitioning to the deepest idle state, the system dynamically selects the optimal idle state depth to maximize net power savings after accounting for transition costs.

Inventive Principle:
Principle #35Parameter changes

3Loss of energy

If optimal idle state is determined for better power savings, then power consumption is reduced, but system complexity increases

Engineering Contradiction:
Improvepower savingsVSAvoidsystem complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The system implements self-service through automated decision-making algorithms that independently determine optimal idle states without requiring complex external control mechanisms. The governor and prediction algorithms autonomously analyze workload patterns and make idle state selections, reducing the need for additional hardware complexity while achieving optimized power savings.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12596425B2Apparatus and method for operating central-processing units in sleep mode
Publication Date: 2026.04.07 MEDIATEK INC
  • US12596425B2 patent drawing
  • US12596425B2 patent drawing
  • US12596425B2 patent drawing

AI summary

An apparatus includes a plurality of CPUs, a CPU scheduler, an idle predictor, and a CPU-idle framework. The CPUs are categorized into a first group and a second group, and a specific CPU is in the first group. When the specific CPU is idle, the CPU scheduler executes an idle task. The idle predictor determines whether the CPUs in the first group corresponding to the specific CPU are going to operate the sleep mode in response to the idle task so as to schedule a sleep schedule of the CPUs in the first group operating in the sleep mode. The CPU-idle framework commands the CPUs in the first group to operate in the sleep mode based on the sleep schedule.