CPU Power Management via Snooping Sleep State Transitions

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Solution Overview

Problem

Conventional power management methods in portable computers are inefficient in managing processor power consumption, leading to reduced usage time due to unnecessary CPU performance state resumption for bus master requests, which is unfavorable for power conservation.

Innovation Solution

A power saving method where the CPU wakes up from a non-snooping sleep state to enter System Management Mode in response to a bus master request, allowing it to transition into a snooping sleep state for reduced power consumption, using a memory-stored interrupt service routine and control signals to manage the arbiter and CPU states effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the CPU resumes to full performance state to respond to bus master requests, then the system can handle peripheral device access requests, but power consumption increases significantly

Engineering Contradiction:
Improvesystem responsivenessVSAvoidCPU power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The CPU dynamically adjusts its operational state based on the type of interrupt received. When a bus master request is detected, the CPU transitions to a partial wake-up state (C1/C2) rather than fully resuming to C0 state, allowing selective handling of peripheral requests while maintaining power efficiency. This dynamic state adjustment resolves the contradiction by making the CPU responsive only when necessary.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention applies different quality levels of CPU wake-up based on the specific interrupt type. For bus master requests, the CPU performs a localized partial wake-up to handle only the specific peripheral access request, rather than a global full resume. This local quality approach allows the system to maintain responsiveness to critical peripheral requests while avoiding the high power consumption of a complete CPU state transition.

Inventive Principle:
Principle #3Local quality

2Use of energy by moving object

If the CPU remains in non-snooping sleep state to conserve power, then power consumption is reduced, but the CPU cannot respond to bus master requests from peripheral devices

Engineering Contradiction:
ImproveCPU power consumptionVSAvoidsystem responsiveness
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The CPU implements dynamic state transitions based on interrupt type. When a bus master request interrupt is detected, the CPU transitions from the non-snooping sleep state (C3) to a partial wake-up state (C1 or C2), enabling selective snooping of bus master requests. This dynamic adjustment ensures the CPU remains power-efficient while becoming responsive only when peripheral device access is required.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the CPU's operational parameters (snooping capability and wake-up level) based on the detected interrupt type. Upon detecting a bus master request, the CPU modifies its snooping parameter from disabled to enabled, and adjusts its power state from C3 to C1/C2, allowing it to respond to peripheral requests while maintaining lower power consumption compared to full C0 state.

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If the CPU enters C3 state for maximum power savings, then power consumption is minimized, but events cannot be transmitted from chip to CPU

Engineering Contradiction:
ImproveCPU power consumptionVSAvoidevent transmission capability
Core Design Contradiction:
Use of energy by moving objectVSEase of operation

Solution Approach 1:

The system dynamically controls event transmission to the CPU based on the CPU's current power state. When the CPU is in C3 state, normal event transmission is blocked. However, when a bus master request is detected, the system dynamically enables event transmission by transitioning the CPU to C1/C2 state, allowing selective communication while maintaining maximum power savings during idle periods.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention extracts the bus master request handling capability from the full CPU wake-up process. Instead of requiring full event transmission and complete CPU resumption, the system selectively extracts and handles only the bus master request interrupts by transitioning to a partial wake-up state, separating this critical function from the full operational resume process.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7565558B2Power saving method and system for a central processing unit disposed in a non-snooping sleep state when a peripheral device sends a bus master request
Publication Date: 2009.07.21 VIA TECH INC
  • US7565558B2 patent drawing
  • US7565558B2 patent drawing
  • US7565558B2 patent drawing

AI summary

A power saving method and system thereof is disclosed. When the central processing unit is under a non-snooping sleep state and a peripheral device sends a bus master request, a chip will drive the central processing unit waking from the non-snooping sleep state and entering a system management mode for executing an interrupt service routine that makes the central processing unit in halt status. The central processing unit is then driven to enter a snooping sleep state for snooping the bus master request. After the execution of the bus master request, the chip will drive the central processing unit to leave the snooping sleep state and return to the non-snooping sleep state for power consumption conservation.