CPU Task Scheduling for SIMD-Affected Logical Cores
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Solution Overview
Problem
Existing technologies fail to address the issue of core operating frequency degradation due to SIMD operations, leading to performance fluctuations and reduced responsiveness in CPU systems, particularly in applications that heavily utilize SIMD instructions like vRAN, without effectively minimizing the number of execution cores or considering frequency fluctuations.
Innovation Solution
A task scheduler device that utilizes hardware multithreading to detect dedicated instruction execution, identify affected logical cores, and allocate processes that can operate at low frequencies, thereby improving core utilization and reducing the number of CPU operation cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If SIMD operations are executed to improve processing throughput, then arithmetic processing performance is improved, but core operating frequency degrades and power consumption increases
Solution Approach 1:
The patent dynamically adjusts CPU core frequency based on SIMD operation detection. The frequency adjustment unit monitors SIMD instruction execution and automatically lowers the frequency of affected cores, creating a dynamic response to workload characteristics that balances performance with power consumption and thermal management.
Solution Approach 2:
The system changes the operating frequency parameter of CPU cores in response to SIMD operation detection. By modifying the frequency parameter dynamically based on workload type, the system optimizes the trade-off between arithmetic processing performance and power consumption/heat generation.
2Productivity
If SIMD operations are executed to improve processing throughput, then arithmetic processing performance is improved, but core operating frequency degrades causing performance fluctuations
Solution Approach 1:
The patent implements a feedback mechanism where the frequency adjustment unit continuously monitors SIMD operation execution and automatically adjusts core frequency in response. This closed-loop control stabilizes system performance by compensating for frequency degradation effects through intelligent resource management and scheduling adjustments.
Solution Approach 2:
The system dynamically adapts core frequency based on real-time detection of SIMD operations. This dynamic adjustment prevents performance fluctuations by proactively modifying operating parameters in response to workload characteristics, maintaining stable system behavior despite varying computational demands.
3Productivity
If hardware multithreading is used to increase logical cores, then core utilization improves, but frequency degradation affects more logical cores
Solution Approach 1:
The patent segments logical cores into groups based on their physical core assignments and SIMD operation impacts. By identifying and isolating affected logical core groups, the system can apply frequency adjustments and scheduling policies selectively, minimizing the harmful effects of frequency degradation while maintaining high utilization of unaffected cores.
Solution Approach 2:
The system applies different frequency and scheduling policies to different logical core groups based on their specific workload characteristics and physical core assignments. This localized approach ensures that frequency degradation effects are contained to specific segments while other logical cores continue operating at optimal frequencies.
4Stability of the object's composition
If dedicated cores are allocated for SIMD instructions to eliminate interference, then performance stability is improved, but the number of available cores for other processes decreases
Solution Approach 1:
The patent enables CPU cores to serve multiple functions dynamically. Cores can execute SIMD operations when needed while the system adjusts frequency and scheduling to maintain performance stability. This universal approach allows the same physical core to handle both SIMD and non-SIMD workloads at different times, eliminating the need for dedicated SIMD cores while maintaining performance stability.
Solution Approach 2:
The system dynamically assigns workloads to cores based on current operational needs rather than using static dedicated assignments. The frequency adjustment and scheduling mechanisms enable cores to transition between handling SIMD and non-SIMD workloads, providing performance stability for SIMD operations while maximizing core availability for other processes through flexible resource allocation.
Data Source
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AI summary
A task scheduler device (100, 100A) includes: a dedicated instruction execution detection unit (110) that detects execution of a dedicated instruction; a dedicated instruction execution affected core identification unit (120) that identifies a logical core which operates on the same physical core as an execution core of the dedicated instruction and whose operating frequency decreases due to the execution of the dedicated instruction; a low frequency allowable process allocation determination unit (140) that makes a determination to identify a process that satisfies a predetermined performance requirement even when operating at a low frequency with respect to the logical core whose operating frequency decreases, which has been identified by the dedicated instruction execution affected core identification unit (120); and a process core allocation unit (150) that allocates the process identified by the low frequency allowable process allocation determination unit (140) to the logical core whose operating frequency decreases.