CPU Power Control with Transient Deadline Guarantees

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Solution Overview

Problem

Existing methods for dynamically controlling power in multicore CPUs face challenges in managing transient workloads, leading to potential task failures due to delayed workload tracking and inefficient resource allocation, especially in portable computing devices where Quality of Service (QoS) requirements are critical.

Innovation Solution

Implementing a dynamic clock and voltage scaling (DCVS) solution that provides transient performance guarantees by ensuring the CPU reaches higher performance levels before deadlines expire, using effective transient budgets to minimize power consumption while maintaining responsiveness, and adjusting frequencies and voltages based on workload dynamics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If dynamic clock and voltage scaling is used to reduce power consumption, then energy efficiency improves, but transient workload tracking delays cause task completion deadlines to be missed

Engineering Contradiction:
ImproveCPU power consumptionVSAvoidtask completion guarantee
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system proactively transitions the CPU to higher performance states before transient workload spikes occur, based on predicted workload patterns. This preliminary action ensures that when transient workloads arrive, the CPU is already at the necessary performance level to complete tasks within deadlines, eliminating the trade-off between power savings and deadline compliance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts CPU performance states based on real-time workload characteristics, distinguishing between steady-state and transient workloads. By making the system adaptive and responsive to changing conditions, it can optimize power consumption during steady-state operation while ensuring adequate performance for transient workloads, resolving the contradiction between energy efficiency and reliability.

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If CPU frequency is reduced to save power, then energy consumption decreases, but workload tracking becomes delayed causing QoS violations

Engineering Contradiction:
Improvepower consumptionVSAvoidworkload tracking delay
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

The system uses periodic workload sampling and analysis to identify transient workload patterns. By periodically monitoring workload characteristics and predicting future demands, the system can proactively adjust performance states at optimal intervals, maintaining accurate workload tracking while minimizing unnecessary high-performance states to reduce power consumption.

Inventive Principle:
Principle #19Periodic action

3Reliability

If CPU performance is increased to meet transient deadlines, then task completion reliability improves, but power consumption increases

Engineering Contradiction:
Improvetransient deadline guaranteeVSAvoidCPU power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system applies different performance levels to different workload types, providing high performance specifically for transient workloads that require deadline guarantees while maintaining lower performance for steady-state workloads. This localized quality approach ensures reliable task completion for time-critical operations without unnecessarily increasing power consumption across all operations.

Inventive Principle:
Principle #3Local quality

4Use of energy by moving object

If steady state filtering is used to determine CPU frequency, then power optimization improves, but transient workload responsiveness deteriorates

Engineering Contradiction:
Improvepower optimizationVSAvoidworkload tracking speed
Core Design Contradiction:
Use of energy by moving objectVSSpeed

Solution Approach 1:

The system segments workload analysis into two distinct components: steady-state filtering for power optimization and transient detection for responsiveness. By separating these functions, the system can use conservative steady-state filtering to determine baseline performance levels while simultaneously monitoring for transient patterns that require immediate response, thus achieving both power efficiency and fast workload tracking.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9104411B2System and method for controlling central processing unit power with guaranteed transient deadlines
Publication Date: 2015.08.11 QUALCOMM INC
  • US9104411B2 patent drawing
  • US9104411B2 patent drawing
  • US9104411B2 patent drawing

AI summary

Methods, systems and devices that include a dynamic clock and voltage scaling (DCVS) solution configured to compute and enforce performance guarantees to ensure that a processor does not remain in a busy state (e.g., due to transient workloads) for more than a predetermined amount of time above that which is required for that processor to complete its pre-computed steady state workload. The DCVS may adjust the frequency and/or voltage of a processor based on a variable delay to ensure that the processing core only falls behind its steady state workload by, at most, a predefined maximum amount of work, irrespective of the operating frequency or voltage of the processor.