CPU Voltage Monitoring with VID-Aware ADC Validation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The dynamic nature of CPU voltage regulation poses challenges for monitoring, as the time required for analog to digital conversion exceeds the rate of VID changes, leading to inaccurate voltage readings due to potential changes during conversion.

Innovation Solution

A system that detects changes in the VID signal during analog to digital conversion, discarding results if a change occurs and accepting them only if no change is detected, allowing for accurate comparison of actual voltage to expected voltage and computation of errors within regulation thresholds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If analog to digital conversion is performed to monitor the supplied voltage, then the voltage can be compared with expected voltage values, but the conversion time is too long (milliseconds) compared to VID change time (microseconds), causing the VID to change during conversion and rendering the digital value inaccurate

Engineering Contradiction:
Improvevoltage measurement accuracyVSAvoidanalog to digital conversion time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system performs preliminary actions by detecting VID changes during the A/D conversion process and discarding potentially inaccurate readings before they can corrupt the monitoring data. This preliminary validation ensures that only accurate voltage measurements are used for comparison with expected values, resolving the timing conflict between slow A/D conversion and fast VID changes.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If the system discards readings when VID changes occur during conversion, then measurement accuracy is improved, but the quantity of valid data points decreases

Engineering Contradiction:
Improvevoltage reading accuracyVSAvoidnumber of valid voltage measurements
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The system applies the discarding principle by eliminating invalid voltage readings taken during VID transitions. By detecting when VID changes occur during A/D conversion and discarding only those specific readings, the system recovers a clean dataset of valid measurements that accurately reflect the voltage state, sacrificing a small number of corrupted data points to ensure overall measurement integrity.

Inventive Principle:
Principle #34Discarding and recovering

3Reliability

If the system monitors voltage continuously to ensure proper regulation, then reliability is improved, but the complexity of the monitoring system increases due to the need to detect VID changes during conversion

Engineering Contradiction:
Improvevoltage regulation verificationVSAvoidmonitoring system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system merges the voltage monitoring function with VID change detection within the same microcontroller unit. By combining these functions and using the existing A/D converter and VID signal access, the system achieves reliable voltage regulation verification without adding separate dedicated hardware components, thus minimizing the increase in system complexity while maintaining high reliability.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20080291071A1System and Method for Analyzing Dynamic CPU Voltage
Publication Date: 2008.11.27 LENOVO INT LTD
  • US20080291071A1 patent drawing
  • US20080291071A1 patent drawing
  • US20080291071A1 patent drawing

AI summary

Systems and methods are disclosed for monitoring a voltage supplied by a voltage regulation module to a processor in response to a dynamic VID generated by the processor. In one embodiment, a voltage monitoring system monitors the voltage generated by the voltage regulation module to ensure the supplied voltage is within regulation thresholds. The voltage monitoring system acquires an analog reading of the supplied voltage and converts it to a digital value. If the VID changes during the conversion, the result of the A/D conversion is discarded. If the VID does not change, the voltage monitoring system accepts the result of the A/D conversion and compares the supplied voltage to the voltage expected in response to the VID. The voltage monitoring system may compute the error between the actual and expected voltage for each accepted A/D conversion. These errors may be accumulated and averaged. The accumulated error may be compared with regulation thresholds, such as a predefined allowable margin of error. If the accumulated error exceeds regulation thresholds, an alert may be generated and action may be taken depending on the degree and severity of the accumulated error.