Crack Arrest Features in Embedded Device Build-Up Packages

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Solution Overview

Problem

Semiconductor chip packaging faces issues with dielectric brittleness and cracking due to thermal cycling, particularly with epoxy-based photo-defined dielectric materials, which are prone to fatigue cracking and limited by high cure temperatures of traditional polyimide and BCB materials.

Innovation Solution

Incorporating deliberately formed dummy lines and traces as crack arrest features within the build-up layers of the package, with high metal density to confine and suppress dielectric cracks, using densely located copper traces and a tough soldermask to prevent crack propagation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If traditional polyimide and BCB materials are used as build-up dielectric material, then the dielectric material is tough and not susceptible to cracking, but the cure temperature is greater than 200° C. which exceeds the panel's temperature processing constraint

Engineering Contradiction:

Improvedielectric material toughnessVSAvoidcure temperature

Core Design Contradiction:

StrengthVSTemperature

Solution Approach 1:

The patent changes the chemical composition and curing parameters of the dielectric material by using epoxy-based photo-defined dielectric materials with Tg less than 180° C. and cure temperatures around 150° C., allowing the material to meet both toughness requirements and temperature processing constraints of the panel

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structures by combining epoxy-based dielectric materials with crack arrest features (dummy lines and traces) to create a composite system that provides both mechanical toughness and crack resistance while maintaining compatibility with low-temperature processing

Inventive Principle:

Principle #40Composite materials

2Temperature

If epoxy based photo defined dielectric material is used, then the cure temperature is compatible with low temperature processing (Tg < 180° C.), but the material is prone to fatigue cracking in regions above the die during reliability testing

Engineering Contradiction:

Improvecure temperatureVSAvoidresistance to fatigue cracking

Core Design Contradiction:

TemperatureVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-forming crack arrest features (dummy lines and traces) within the dielectric material before reliability testing. These features are strategically placed to intercept and arrest cracks before they can propagate through critical regions above the die, thereby preventing fatigue cracking failures

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent converts the inherent brittleness and crack susceptibility of epoxy-based dielectric materials into a benefit by using the crack arrest features to control and localize crack propagation. The dummy lines and traces act as predetermined crack paths that contain cracks to small areas, transforming a harmful defect into a controlled feature that enhances overall package reliability

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Temperature

If low temperature processing is used, then the panel temperature constraint is satisfied, but the selection of build-up dielectric material is limited

Engineering Contradiction:

Improveprocessing temperatureVSAvoiddielectric material selection

Core Design Contradiction:

TemperatureVSAdaptability or versatility

Solution Approach 1:

The patent expands material selection by changing the processing temperature parameters to low-temperature curing (around 150° C. for photo-defined dielectrics), which enables the use of a broader range of dielectric materials including epoxy-based materials, polyimide, and BCB that can be cured at temperatures below 200° C.

Inventive Principle:

Principle #35Parameter changes

4Reliability

If crack arrest features with high metal density are incorporated, then dielectric cracks are confined to small areas and propagation is suppressed, but the device complexity increases

Engineering Contradiction:

Improvecrack propagation suppressionVSAvoidstructure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the dielectric material into regions separated by crack arrest features (dummy lines and traces). These features segment the continuous dielectric structure into smaller zones, confining potential cracks to specific segments and preventing their propagation across the entire package, thereby enhancing reliability through structural division

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS7553753B2Method of forming crack arrest features in embedded device build-up package and package thereof

Publication Date: 2009.06.30 NXP USA INC

AI summary

A method of forming an embedded device build-up package (10) includes forming a first plurality of features (22) over a packaging substrate (12,16,18), wherein the first plurality of features (22) comprises a first feature and a second feature, forming at least a first crack arrest feature (28) in a first crack arrest available region (26), wherein the first crack arrest available region is between the first feature and the second feature, forming a second plurality of features (32) over the first plurality of features (22) wherein the second plurality of features includes a third feature and a fourth feature, and forming at least a second crack arrest feature (36) in a second crack arrest available region (34), wherein the second crack arrest feature (36) is between the third feature and the fourth feature, and the second crack arrest feature (36) is substantially orthogonal to the first crack arrest feature (28).