Crack Propagation Guides for Low-Damage Semiconductor Chip Separation
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Solution Overview
Problem
Current methods for dicing semiconductor chips to increase three-dimensional integration face challenges in minimizing damage and efficiently separating chips from substrates, as existing dicing techniques may cause unintended damage and defects during the separation process.
Innovation Solution
A method involving the formation of alternating material layers and trenches on a semiconductor substrate, followed by the creation of crack propagation guides to control the direction of crack growth, allowing for precise separation of semiconductor chips with reduced damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional dicing techniques are used to separate semiconductor chips from substrate, then chip separation is achieved, but damage and defects occur to the semiconductor chip
Solution Approach 1:
Crack propagation guides are formed within the layer stack before the dicing process. These guides pre-establish controlled fracture paths that will direct crack propagation during separation, preventing uncontrolled damage to the chip structure while enabling efficient chip release from the substrate
Solution Approach 2:
The crack propagation guides act as intermediary structures between the cutting force applied during dicing and the chip substrate. These guides mediate the separation process by providing a predetermined path for crack propagation, thereby controlling the force distribution and preventing direct damage to the chip while facilitating clean separation
2Productivity
If multiple material layers are stacked to increase three-dimensional integration, then integration density is improved, but complexity of manufacturing process increases
Solution Approach 1:
The manufacturing process is segmented into distinct stages: forming alternating material layers (first layer stack), creating trenches and filling with crack propagation guides, then forming additional layers (second layer stack) with additional guides. This segmentation allows complex 3D structures to be built systematically while maintaining control over each fabrication step
Solution Approach 2:
Crack propagation guides are nested within the multi-layer stack structure, with first guides formed in trenches within the first layer stack, and second guides formed in openings within the second layer stack. This nesting approach integrates the crack propagation control features directly into the 3D structure without requiring separate processing steps, thereby managing manufacturing complexity
Data Source
AI summary
There may be presented a method of manufacturing a semiconductor chip. A first layer stack in which first material layers and second material layers are alternately stacked is formed over a semiconductor substrate including a chip region and a scribe lane region, and first crack propagation guides are formed on the first layer stack. A second layer stack is formed on the first layer stack and the first crack propagation guides, and second crack propagation guides are formed. A semiconductor chip is separated from the semiconductor substrate.