CBRAM Forming Pulse Optimization for Fast Programming

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional Conductive Bridging Random Access Memory (CBRAM) devices require a time-consuming forming step with high current pulses, which limits their programming speed and memory window, making them unsuitable for fast programming and scalable memory applications.

Innovation Solution

A method for operating CBRAM devices using a forming current pulse with reduced amplitude (10 uA or less) and width (100 ns or less), allowing parallel conditioning of multiple devices and enabling multilevel programming through adjustable set current pulses, while maintaining compatibility with CMOS processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high current pulses with long pulse width are used for forming, then the conductive filament is successfully formed, but the forming step becomes time-consuming

Engineering Contradiction:
Improveforming reliabilityVSAvoidforming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent changes the electrical parameters of the forming pulse, specifically using reduced current amplitude (10 µA or less) and reduced pulse width (100 ns or less) compared to conventional high current and long duration pulses. This parameter optimization enables successful filament formation while dramatically reducing the forming time and making the process suitable for high-speed memory operations

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs pulsed electrical signals with specific timing characteristics to form the conductive filament. By using periodic or pulsed action with optimized duration (100 ns or less), the method achieves reliable filament formation without requiring continuous high current application, thus reducing the overall forming time

Inventive Principle:
Principle #19Periodic action

2Reliability

If high current level is used for forming and programming, then the memory window is improved, but the programming speed is limited

Engineering Contradiction:
Improvememory windowVSAvoidprogramming speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent optimizes the electrical parameters of programming pulses by using reduced current amplitude (10 µA or less) and reduced pulse width (100 ns or less). This parameter change enables both fast programming speed and sufficient memory window by finding the optimal balance between current magnitude and pulse duration, avoiding the need for high current levels that limit speed

Inventive Principle:
Principle #35Parameter changes

3Reliability

If high current density is used for forming, then the conductive filament is formed, but the current consumption increases

Engineering Contradiction:
Improveforming successVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent reduces the current amplitude parameter to 10 µA or less during the forming operation, which significantly lowers the current consumption compared to conventional high current forming methods. This parameter optimization demonstrates that successful filament formation can be achieved with low current density, reducing energy consumption and enabling scalable memory arrays

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces the time required for conditioning CBRAM devices, enables faster programming, and maintains a sufficient memory window, facilitating the integration of CBRAM devices in memory arrays with improved scalability and programming efficiency.

Implementation Method 1

The operation of the CBRAM device relies on the voltage-induced redox-based formation and rupture of a metal-based, e.g. Cu or Ag, conductive filament (CF) in the insulating layer acting as a solid state electrolyte

Methodology Applied
Scientific EffectRedox reactions: Redox Reactions

Implementation Method 2

When an electrical field is applied between both top and bottom electrodes, metal cations provided by the active top electrode drift towards the opposite inert bottom electrode through the insulating layer thereby forming the conductive filament

Methodology Applied
Scientific EffectIon drift: Electrophoresis

Data Source

PatentUS9685229B2Method for operating a conductive bridging memory device
Publication Date: 2017.06.20 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • US9685229B2 patent drawing
  • US9685229B2 patent drawing
  • US9685229B2 patent drawing

AI summary

A method is disclosed for operating a Conductive Bridge Random Access Memory (CBRAM) device that includes an electrolyte element sandwiched between a cation supply top electrode and a bottom electrode. The method comprises conditioning the CBRAM device by applying a forming current pulse having a pulse width (tf) of 100 ns or less and a pulse amplitude (If) of 10 uA or less, and when programming, setting the conditioned CBRAM device to a Low Resistance State (LRS) by applying a set current pulse having a pulse width (ts) of 100 ns or less and a pulse amplitude (Is) equal to or larger than the forming current pulse amplitude (If).