CRC Accumulator Architecture for Variable-Size Disk Data Segments
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Solution Overview
Problem
Conventional disk controllers face inefficiencies in accumulating and applying cyclic redundancy check (CRC) values for data segments of varying sizes, particularly when transitioning from an 8-bit interface to a 10-bit symbol interface, as they struggle to handle residue effectively without complex modifications.
Innovation Solution
A method and system that process upper bits from a CRC accumulator with incoming data segments, using a feedback multiplier to accumulate CRC values efficiently for data segments of variable sizes, incorporating a register for staging data and a programmable mask to handle residues, enabling CRC calculation across different sector sizes and interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional disk controllers use an 8-bit interface for CRC handling, then the system is simple to implement, but it cannot effectively handle 10-bit symbol interfaces and varying data segment sizes
Solution Approach 1:
The CRC accumulator is designed to handle multiple interface types (8-bit and 10-bit symbol interfaces) through a unified architecture. The feedback multiplier and masking mechanism enable the same hardware to accommodate varying data segment sizes and interface requirements without requiring separate dedicated circuits for each interface type.
Solution Approach 2:
The system dynamically adjusts its operation based on data segment size and interface type by modifying the feedback multiplier application and masking parameters. This allows the CRC calculator to adapt to different interface requirements (8-bit vs 10-bit) and variable segment sizes by changing operational parameters rather than physical structure.
2Productivity
If disk controllers process CRC for each data segment individually, then accuracy is maintained, but processing speed decreases
Solution Approach 1:
The system performs preliminary CRC accumulation on data segments before final CRC calculation. By pre-processing segments through the feedback multiplier and accumulating partial CRC values, the system prepares data in advance for the final CRC computation, enabling faster overall processing while maintaining accuracy through the mathematical properties of CRC accumulation.
Solution Approach 2:
The CRC accumulation operates continuously across multiple data segments rather than completing one full CRC calculation at a time. The feedback multiplier continuously processes incoming segments and updates the accumulated CRC value, maintaining continuous useful action throughout the data transfer process rather than intermittent batch processing.
3Adaptability or versatility
If the system uses a fixed-size CRC accumulator, then hardware design is simplified, but it cannot handle variable-size data segments effectively
Solution Approach 1:
The system dynamically adjusts the masking applied to the CRC accumulator based on the size of the current data segment being processed. Rather than requiring a variable-size accumulator, the fixed-size hardware achieves flexibility through dynamic masking that effectively truncates or includes specific portions of the accumulated CRC value depending on segment size requirements.
Solution Approach 2:
The masking mechanism acts as an intermediary between the fixed-size CRC accumulator and variable-size data segments. By applying appropriate masks, the system mediates between the fixed hardware structure and the variable data requirements, enabling the accumulator to effectively handle segments of any size without requiring physical reconfiguration.
Data Source
AI summary
A method and system for accumulating CRC value is provided. The system includes a disk controller with a register for staging data segments of variable size, a CRC accumulator for accumulating CRC for data segments of variable size, a feedback multiplier that receives processed upper bits from the CRC accumulator containing previously accumulated CRC and incoming data segments from the register; and bits from the multiplier and the CRC accumulator are added and result from the adding is stored in the CRC accumulator. The method includes processing upper bits from the CRC accumulator containing previously accumulated CRC and incoming data segments, sending the processed results to the multiplier; adding bits from the multiplier and the CRC accumulator, and storing a result from the adding of the bits in the CRC accumulator and the multiplier.