CRC Circuit Partitioning for Variable-Length Data Packets
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Solution Overview
Problem
Conventional CRC circuits are inefficient in terms of circuit use and power consumption due to the need for multiple sets of CRC hardware to handle data packets with non-integer multiples of word lengths, leading to increased chip area and power consumption.
Innovation Solution
A method and circuit architecture that performs error checking calculations using a single CRC circuit by partitioning data into full data lines and a remainder, with the option to add padding vectors to ensure all data lines have a uniform length, thereby eliminating the need for multiple CRC circuits and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple sets of CRC hardware are used to handle data packets with non-integer multiples of word lengths, then the CRC calculation can be performed on all data packets, but the chip area and power consumption increase
Solution Approach 1:
The patent implements a single CRC circuit that can process data packets of any length by partitioning them into full data lines and remainders. The circuit universally handles both integer and non-integer multiples of word lengths through a unified architecture that uses padding vectors and iterative processing, eliminating the need for multiple specialized CRC hardware units.
Solution Approach 2:
The patent segments data packets into full data lines (integer multiples of word length) and remainder portions. This segmentation allows the single CRC circuit to process each segment separately, with the remainder being handled through iterative processing or padding, thereby maintaining versatility without requiring additional hardware.
2Adaptability or versatility
If multiple sets of CRC hardware are used to handle data packets with non-integer multiples of word lengths, then the CRC calculation can be performed on all data packets, but the power consumption increases
Solution Approach 1:
The single universal CRC circuit processes all data packets regardless of length, activating only the necessary processing stages for each packet type. This avoids the continuous power consumption of multiple idle CRC hardware units, reducing overall power usage while maintaining full adaptability.
Solution Approach 2:
The circuit uses iterative processing for remainder portions, activating the CRC calculation only when needed rather than continuously. This periodic activation reduces power consumption compared to having multiple always-on CRC hardware units.
3Area of stationary object
If a single CRC circuit is used with data partitioning, then chip area is reduced, but the calculation speed may be affected
Solution Approach 1:
By segmenting data into full data lines and remainders, the circuit can process full data lines in parallel through the single CRC unit, maximizing throughput. The remainder processing, while sequential, affects minimal data volume, thus maintaining high overall calculation speed.
Solution Approach 2:
The circuit performs preliminary processing by identifying and separating full data lines from remainders before CRC calculation. This preparation allows the single CRC circuit to focus on optimized processing of standardized data line lengths, improving calculation efficiency.
Data Source
AI summary
A data partitioning circuit partitions received data and an appended error checking code into a plurality of data lines having a fixed length and a last line. A vector selector inserts a pad vector after the appended error checking code when the last line is less than the first length and not equal to the first fixed length minus a length of the appended error checking code, and selects one of a plurality of error checking vectors, the pad vector having a length providing the last line with the first fixed length when appended thereafter, and the plurality of error checking vectors comprising an initial vector and an error checking code feedback vector. An error checking code calculation circuit performs error checking calculations on the plurality of data lines and the last line to generate an error checking result.