CRC Control Unit for Semiconductor Data Processing Area Reduction
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Solution Overview
Problem
Conventional semiconductor memory devices require increased area consumption when performing cyclic redundancy checks (CRC) on higher bit line configurations, such as 16 bit lines, due to the need for multiple CRC operators, which is not efficient in terms of chip size and data processing.
Innovation Solution
A semiconductor device with a CRC control unit that generates a second control signal with a shorter cycle than the first, allowing sequential processing and output of data groups with a time lag, enabling a single CRC operation unit to perform checks on twice the amount of data by dividing the control signal and using latch units and a selection unit to manage data groups.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple CRC operators are used to process data from 16 bit lines, then data processing capability is improved, but area consumption increases
Solution Approach 1:
The patent divides data from 16 bit lines into two groups of 8 bits each, processing them sequentially through a single CRC operator. The control unit generates control signals that enable the CRC operator to first process data from the first 8 bit lines, then process data from the second 8 bit lines, effectively segmenting the processing task to avoid needing two parallel CRC operators.
Solution Approach 2:
The patent employs periodic control signals with different cycles to manage the sequential processing. A first control signal with a first cycle controls the initial processing phase, while a second control signal with a second cycle controls the subsequent processing phase. This periodic action allows one CRC operator to handle what would otherwise require two simultaneous operators.
2Area of stationary object
If a single CRC operator processes data from 16 bit lines sequentially, then area consumption is reduced, but processing time increases
Solution Approach 1:
The patent ensures continuous useful action by overlapping the processing cycles. While the first data group is being processed under the first control signal, the system prepares the second data group for processing. The transition between control signals is managed to minimize idle time, maintaining continuous productive operation of the CRC operator without significant processing delays.
Data Source
AI summary
A semiconductor device includes: a control signal generation unit configured to generate a second control signal having a cycle shorter than a first control signal in response to a clock signal and the first control signal; a cyclic redundancy check (CRC) control unit configured to perform a control to receive first and second data groups in response to the second control signal, and to output the first and second data groups with a time lag; and a CRC operation unit configured to perform a cyclic redundancy check on each of the first and second data groups sequentially output through the CRC control unit.