Integrated Circuit Error Detection Using Segmented CRC Circuits
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Solution Overview
Problem
In high-speed chip communications, existing error detection and correction schemes require significant bandwidth and introduce latency, making it difficult to determine the root cause of errors, especially when errors in control or address information affect other data transfers.
Innovation Solution
An integrated circuit generates and logs multiple error codes for control, write, and read data transactions, using circular buffers and compression circuits to compare these codes with those from a controller device, allowing for efficient error detection and retry mechanisms to correct errors without contaminating data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complicated error detection and correction schemes are used to detect and correct errors in information, then reliability is improved, but bandwidth is consumed and latency is introduced degrading system performance
Solution Approach 1:
The patent segments error detection into separate CRC circuits for control information and data information, allowing independent error detection for each type of information without requiring comprehensive error checking schemes that consume excessive bandwidth and introduce latency
Solution Approach 2:
The patent extracts only the essential error detection capability (CRC codes) from complex error correction schemes, using separate CRC circuits for control and data information to detect errors without implementing full error correction functionality that would consume more bandwidth
2Measurement precision
If comprehensive error detection schemes are implemented to identify root cause of errors, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent divides the error detection system into separate CRC circuits for control information and data information, each generating independent CRC codes. This segmentation allows precise identification of whether errors occurred in control information, data information, or both, without requiring a single complex error detection system
Solution Approach 2:
The patent uses CRC codes as intermediary values generated by separate CRC circuits to indicate errors in control information and data information independently. These CRC codes serve as mediators that enable precise error identification without directly complexifying the main error detection system
Data Source
AI summary
An integrated circuit, such as an integrated circuit memory or buffer device, method and system, among other embodiments, generate a plurality of error codes, such as CRC codes, corresponding to control information, write data and read data transactions, respectively. The plurality of separately generated CRC codes is logged or stored in respective storage circuits, such as circular buffers. The stored plurality of CRC codes corresponding to each transaction then may be used to determine whether an error occurred during a particular transaction and thus whether a retry of the particular transaction is issued. The integrated circuit includes a compare circuit to compare a CRC code generated by the integrated circuit with a CRC code provided by a controller device. A CRC code corresponding to read data is transferred to a controller device using a data mask signal line that is not being used during a read transaction. The CRC code generated by the integrated circuit then may be compared to a CRC code generated by the controller device to determine whether an error occurred. The controller device generates and stores a plurality of CRC codes, corresponding to control information, write data and read data. The controller device then compares the CRC codes generated by the controller device with CRC codes generated and stored in the integrated circuit to determine whether an error has occurred during a particular transaction.