CRC Update Mechanism for Low-Latency Soft Error Detection
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Solution Overview
Problem
Current solutions fail to detect soft errors in data packet transmission due to the complexity of updating the Ethernet cyclic redundancy check (CRC) in wide datapath endpoints, leading to undetectable errors.
Innovation Solution
A CRC update mechanism that maintains and updates the CRC throughout the datapath, using coefficient ROMs for parallel access and low-latency calculations, allowing detection of soft errors during packet storage, field extraction, and recompaction, and is implemented in hardware to enhance soft-error performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the Ethernet CRC is recomputed after header updates in wide datapath endpoints, then the CRC integrity is maintained, but the complexity of the system increases and soft errors remain undetectable
Solution Approach 1:
The patent segments the CRC verification process by introducing intermediate CRC checks at strategic points within the datapath (ingress and egress edges) rather than only at the endpoints. This segmentation allows soft error detection without requiring full CRC recomputation throughout the entire datapath, thereby reducing complexity while maintaining reliability.
Solution Approach 2:
The patent introduces intermediate CRC calculation points as mediators between the ingress and egress endpoints. These intermediate points perform localized CRC updates and verifications, acting as mediators that detect soft errors without requiring the complex full-system CRC recomputation that would otherwise be needed to maintain integrity across the entire datapath.
2Reliability
If the CRC is updated at wide datapath endpoints, then the error detection is possible, but the latency increases due to serial data processing
Solution Approach 1:
The patent performs preliminary CRC calculations at intermediate points within the datapath before data reaches the final egress endpoint. By calculating CRC values earlier in the data flow and maintaining them through the datapath, the system avoids the time-consuming operation of recomputing CRC from scratch at the endpoint, thus reducing latency while maintaining error detection capability.
Solution Approach 2:
The patent maintains continuous CRC validity throughout the datapath by updating and propagating CRC values continuously as data moves through intermediate stages. This continuous maintenance of CRC integrity eliminates the need for discontinuous, time-consuming full CRC recomputations at endpoints, thereby reducing latency while preserving soft error detection capability.
3Measurement precision
If the entire CRC is recomputed for header changes, then the accuracy of error detection is ensured, but the processing speed decreases
Solution Approach 1:
The patent applies partial action by performing CRC updates and verifications only at intermediate points within the datapath rather than recomputing the entire CRC for every header change throughout the system. This partial verification approach maintains sufficient accuracy for detecting soft errors while significantly improving packet processing throughput by avoiding excessive full CRC recomputations.
Solution Approach 2:
The patent implements local quality by performing localized CRC calculations at specific intermediate points within the datapath rather than applying uniform full CRC recomputation across the entire system. This localized approach maintains verification accuracy where needed while improving overall productivity by reducing the scope of CRC operations to only the necessary local regions.
Data Source
AI summary
A cyclic redundancy code (CRC) update device includes an input coupled to obtain an old CRC that corresponds to an old header of a communication packet, a CRC storage device to store CRC coefficients, a CRC calculator coupled to receive a modified old header of the communication packet and calculate a new CRC on the modified old header, and a polynomial multiplier coupled to the CRC storage device to receive the new CRC, obtain a corresponding coefficient from the CRC storage device, and generate an update for the CRC of the frame.