Credit-Based Arbitration Circuit for Low-Latency Data Transfer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional arbitration schemes in data processing systems are inefficient due to large propagation delays between data sources and destinations, as they require data sources to wait for arbitration grants before sending data items, leading to increased latency and reduced throughput.
Innovation Solution
The proposed solution involves data sources sending data items and arbitration requests simultaneously, with the arbitration circuitry buffering and serving the data items based on the requests, using a credit-based flow control mechanism and First-In First-Out (FIFO) memories to manage the data transfer, decoupling arbitration from the need for immediate grants.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If data sources wait for arbitration grants before sending data items, then arbitration control is simplified, but end-to-end latency increases and throughput decreases
Solution Approach 1:
The system performs preliminary actions by having data sources send data items and arbitration requests simultaneously without waiting for grants. The arbitration circuitry receives and buffers these items upfront, then performs arbitration on the buffered data. This preliminary buffering action eliminates the need for data sources to wait for arbitration grants, thereby reducing end-to-end latency while maintaining arbitration control.
Solution Approach 2:
The system segments the arbitration process into two independent parts: (1) data transmission phase where sources send data and requests simultaneously, and (2) arbitration phase where the circuitry arbitrates buffered data. This segmentation allows data flow to proceed independently of arbitration completion, reducing latency while keeping arbitration control manageable.
2Loss of time
If data sources send data items and arbitration requests simultaneously, then end-to-end latency is reduced, but arbitration circuitry complexity increases due to buffering requirements
Solution Approach 1:
The arbitration circuitry acts as an intermediary with buffering capability between data sources and the destination. It receives and buffers data items and arbitration requests from multiple sources, then performs arbitration on the buffered data before serving it to the destination. This intermediary buffering mechanism enables simultaneous sending of data and requests while managing the increased circuitry complexity through centralized arbitration logic.
Solution Approach 2:
The arbitration circuitry is designed as a universal multi-functional unit that handles multiple functions: receiving data from multiple sources, buffering data items, arbitrating between competing data requests, and serving arbitrated data to the destination. This multi-functionality consolidates the increased complexity into a single versatile component rather than requiring separate specialized circuits for each function.
3Productivity
If arbitration is performed on buffered data items, then throughput is improved by continuous data flow, but memory requirements for buffering increase
Solution Approach 1:
The system maintains continuity of useful action by having data sources continuously send data items and arbitration requests simultaneously. The arbitration circuitry continuously arbitrates the buffered data and serves it to the destination without idle waiting periods. This continuous data flow improves throughput, while the buffering memory volume is optimized to hold only the necessary data items during the arbitration processing time.
Data Source
AI summary
An apparatus includes multiple data sources and arbitration circuitry. The data sources are configured to send to a common destination data items and respective arbitration requests, such that the data items are sent to the destination regardless of receiving any indication that the data items were served to the destination in response to the respective arbitration requests. The arbitration circuitry is configured to receive and buffer the data items, to perform arbitration on the buffered data items responsively to the arbitration requests, and to serve the buffered data items to the destination in accordance with the arbitration.