Credit-Based Pause Frame Interface for Data Rate Mismatch
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Solution Overview
Problem
Existing systems for transmitting data between circuits with different rates suffer from performance degradation due to half duplex mode implications and high latency caused by Carrier Sense Deferral Systems and Pause Frames/Recovery Frames, which require large buffers and result in inefficiencies.
Innovation Solution
A system that monitors buffer thresholds to dynamically transmit pause and recovery requests between circuits, allowing the faster circuit to halt and resume data transmission based on buffer capacity, thereby maintaining low latency and preventing performance degradation without data shaping or scheduling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Pause Frames/Recovery Frames are used for back pressure, then data transmission rate mismatch is handled, but latency increases and performance degrades
Solution Approach 1:
The patent applies preliminary action by pre-negotiating and establishing credit limits and pause frame parameters before actual data transmission begins. This allows the system to immediately enforce back pressure without waiting for buffer overflow conditions, reducing latency while maintaining reliability.
Solution Approach 2:
The patent implements feedback mechanisms where pause frame acknowledgments are tracked and credited. When credit is consumed by pause frames, transmission is halted; when credit is returned via acknowledgments, transmission resumes. This closed-loop feedback system efficiently manages back pressure with minimal latency.
2Reliability
If Carrier Sense Deferral System is used for back pressure, then data rate mismatch is managed, but performance degradation occurs due to half duplex mode
Solution Approach 1:
The patent applies dynamics by making the transmission mode flexible - the faster circuit can dynamically switch between continuous transmission and pause frame-based back pressure based on credit availability. This maintains full-duplex capabilities while implementing effective back pressure, avoiding the performance degradation of half-duplex mode.
Solution Approach 2:
The patent changes the parameter of transmission continuity by introducing credit-based pause frames. Instead of forcing half-duplex operation, it modifies the transmission parameter to allow selective pausing while maintaining full-duplex capability, thus preserving performance while achieving back pressure.
3Reliability
If Pause Frames/Recovery Frames require large receiver buffers, then data rate mismatch is handled, but device complexity and cost increase
Solution Approach 1:
The patent applies partial action by using pause frames selectively only when credit is exhausted, rather than requiring large buffers for all possible data. This partial use of pause frames allows smaller buffers while maintaining reliability, reducing device complexity and cost.
Solution Approach 2:
The patent introduces credit as an intermediary mechanism between the faster and slower circuits. This credit system mediates the data flow, allowing the slower circuit to control the faster circuit's transmission without requiring large buffers, thus reducing complexity while maintaining reliability.
4Ease of manufacture
If back pressure is implemented without credit tracking, then implementation is simpler, but transmission resumption efficiency decreases
Solution Approach 1:
The patent implements feedback by tracking pause frame acknowledgments and maintaining credit counts. This feedback mechanism automatically triggers transmission resumption when credit is available, improving efficiency without significantly complicating implementation, as the credit tracking is integrated into the existing pause frame protocol.
Data Source
AI summary
A system for transmitting data to a first circuit that transmits and receives data at a first rate from a second circuit that transmits data at second rate that is greater than the first rate. This invention includes an interface that transmits pause frames to the second circuit in response to an event in order to halt transmission from the second circuit to the first circuit. The second circuit then halts transmitting data until a message to resume transmission is received.


