Crescent Buffer Layer for Planar FinFET Epitaxial Growth
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Solution Overview
Problem
Existing methods for fabricating semiconductor devices, such as fin field effect transistors (FinFETs), face challenges in achieving an even surface for epitaxial layers, which affects device performance due to stress-induced issues.
Innovation Solution
A method involving the formation of a buffer layer with a crescent moon shape adjacent to the gate structure, which includes an inner curve, an outer curve, and a planar surface connecting them, directly contacting the outer curve on the outer sidewall of the spacer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If selective epitaxial growth (SEG) technique is used to form epitaxial structure, then carrier mobility is increased through stress application, but the surface evenness deteriorates affecting device performance
Solution Approach 1:
A buffer layer is formed prior to the epitaxial layer to pre-compensate for stress and surface irregularities. The buffer layer is designed with specific thickness and material composition to counteract the stress-induced surface deformation before the critical epitaxial growth occurs, ensuring both high carrier mobility and surface evenness
Solution Approach 2:
The buffer layer is positioned specifically adjacent to the gate structure where stress concentration occurs, rather than uniformly across the entire substrate. This localized approach addresses the surface evenness problem in the critical region while maintaining the stress-induced carrier mobility enhancement
2Reliability
If epitaxial layers are formed to induce stress in non-planar MOS transistors, then carrier mobility improves, but obtaining an even surface becomes difficult
Solution Approach 1:
The buffer layer is formed before the epitaxial layer to pre-compensate for stress and surface irregularities. By establishing a stable, even surface foundation first, the subsequent epitaxial growth can proceed with both high quality and proper stress induction
Solution Approach 2:
The buffer layer acts as an intermediary between the substrate and the epitaxial layer. It mediates the stress transmission while providing a stable, even surface for epitaxial growth, decoupling the stress induction function from the surface quality requirement
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the surface evenness and reduces stress variations, enhancing the carrier mobility and performance of semiconductor devices by maintaining a planar surface for subsequent epitaxial growth.
Implementation Method 1
reduces stress variations, enhancing the carrier mobility and performance of semiconductor devices by maintaining a planar surface for subsequent epitaxial growth
Data Source
AI summary
A semiconductor device includes a gate structure on a substrate, a spacer around the gate structure, and a buffer layer adjacent to the gate structure. Preferably, the buffer layer includes a crescent moon shape and the buffer layer includes an inner curve, an outer curve, and a planar surface connecting the inner curve and an outer curve along a top surface of the substrate, in which the planar surface directly contacts the outer curve on an outer sidewall of the spacer.