Crested Barrier Memory Device for Low Power Neural Networks
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Solution Overview
Problem
Current memory and selector devices in neural networks face challenges with high leakage current and power consumption due to large voltage requirements and lack of selectivity, which hinder efficient operation and scalability.
Innovation Solution
A crested barrier memory and selector device is developed, combining a self-rectifying layer and an active layer with a high dielectric constant, where the conduction band offset is greater than 1.5 eV and the valence band offset is less than -0.5 eV, allowing for reduced operating voltage and improved selectivity by using materials like cobalt oxide and titanium oxide, and incorporating tunneling layers to form a crested barrier structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional memory and selector devices are used in neural networks, then device functionality is achieved, but leakage current increases and power consumption rises due to large voltage requirements and lack of selectivity
Solution Approach 1:
The device is segmented into distinct functional layers: a first self-rectifying layer for voltage blocking, a combined barrier and active layer for ion transport and resistance modulation, and a second self-rectifying layer. This segmentation allows each layer to perform its specific function optimally, reducing leakage current while maintaining selectivity without requiring large voltage swings.
Solution Approach 2:
The patent employs composite material structures including self-rectifying layers made from materials like cobalt oxide or gallium oxide, and combined barrier/active layers using titanium oxide or hafnium oxide. These composite material choices enable simultaneous achievement of low leakage current through rectification and high selectivity through controlled ion transport, reducing overall power consumption.
2Power
If large voltage requirements are used to achieve memory function, then switching capability is maintained, but power consumption increases
Solution Approach 1:
The patent changes key material parameters including band offsets (conduction band offset greater than 1.5 eV, valence band offset less than -0.5 eV), dielectric constants (first layer at least 1.5 times larger than second layer), and material composition ratios. These parameter changes enable the device to achieve proper rectification and ion transport behavior at reduced voltage levels, lowering power consumption while maintaining switching capability.
3Loss of energy
If self-rectifying layers with appropriate band offsets are used, then leakage current is reduced, but manufacturing complexity increases due to precise material deposition requirements
Solution Approach 1:
The patent specifies precise parameter ranges for manufacturability: conduction band offset greater than 1.5 eV but less than 3.5 eV, valence band offset less than -0.5 eV but greater than -1.5 eV, and dielectric constant ratio of at least 1.5 times. These defined parameter windows guide material selection and deposition process control, enabling reduced leakage current through achievable fabrication precision using standard thin-film deposition techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The crested barrier device reduces power consumption by up to 50% and enhances selectivity, enabling efficient operation with lower voltage levels and minimizing leakage current, making it suitable for large neural network arrays and multi-state memory implementations.
Implementation Method 1
A first self-rectifying layer may be between the first electrode and the active layer. A conduction band offset between the first self-rectifying layer and the combined barrier and active layer may be greater than approximately 1.5 eV.
Implementation Method 2
The active layer may be between the first self-rectifying layer and the second electrode. The combined barrier and active layer may include V2O5, Ta2O5, CuO, Fe2O3, ZnO, or Ga2O3.
Implementation Method 3
A crested barrier memory and selector device is developed, combining a self-rectifying layer and an active layer with a high dielectric constant, where the conduction band offset is greater than 1.5 eV and the valence band offset is less than -0.5 eV
Implementation Method 4
A crested barrier memory and selector device is developed, combining a self-rectifying layer and an active layer with a high dielectric constant, where the conduction band offset is greater than 1.5 eV and the valence band offset is less than -0.5 eV, allowing for reduced operating voltage and improved selectivity by using materials like cobalt oxide and titanium oxide, and incorporating tunneling layers to form a crested barrier structure.
Data Source
AI summary
A crested barrier memory device may include a first electrode, a first self-rectifying layer, and a combined barrier and active layer. The first self-rectifying layer may be between the first electrode and the active layer. A conduction band offset between the first self-rectifying layer and the combined barrier and active layer may be greater than approximately 1.5 eV. A valence band offset between the first self-rectifying layer and the combined barrier and active layer may be less than approximately −0.5 eV. The device may also include a second electrode. The active layer may be between the first self-rectifying layer and the second electrode.