Critical Path Coverage Analyzer for Post-Silicon Validation

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Solution Overview

Problem

Current post-silicon pseudo-random software validation tools have limited critical path coverage and fail to simulate real-life operational environments, leading to issues like race conditions and transient power characteristics.

Innovation Solution

A system and method that modifies a simulation model and optimizes an application program to produce hardware-identified operating conditions matched with simulator-identified conditions, using a critical path coverage analyzer to inject errors and ensure thorough testing of critical paths, and then compares these conditions to enhance simulator accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If pseudo-random software validation tools are used for functional verification, then functional coverage is improved, but critical path coverage deteriorates

Engineering Contradiction:

Improvefunctional verification coverageVSAvoidcritical path coverage

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The validation process is segmented into two distinct phases: functional verification using pseudo-random software and critical path verification using deterministic test patterns. This segmentation allows each phase to optimize for its specific goal without compromising the other, resolving the contradiction between functional coverage and critical path coverage.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system dynamically switches between pseudo-random validation modes and deterministic critical path testing modes based on the verification objectives. This dynamic approach enables the same hardware device to achieve both high functional coverage and high critical path coverage at different times, eliminating the trade-off.

Inventive Principle:

Principle #15Dynamics

2Reliability

If test patterns are used on manufacturing tester, then critical path coverage is improved, but real-life operational environment simulation deteriorates

Engineering Contradiction:

Improvecritical path coverageVSAvoidreal-life environment simulation

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The invention merges the advantages of deterministic test patterns (high critical path coverage) with the advantages of pseudo-random software (real-life environment simulation) by executing both types of validation on the same hardware device. This combination allows the system to achieve both high reliability and high adaptability simultaneously.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The hardware device is designed to perform multiple functions: it can execute pseudo-random validation software for functional verification and real-life environment simulation, and it can also execute deterministic test patterns for critical path verification. This multi-functionality resolves the contradiction by allowing a single system to achieve both goals.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Extent of automation

If LBIST is used for critical path verification, then automation is improved, but critical path coverage deteriorates due to limited execution time

Engineering Contradiction:

Improveverification automationVSAvoidcritical path coverage

Core Design Contradiction:

Extent of automationVSReliability

Solution Approach 1:

The system creates a deterministic copy of the validation process that specifically targets critical paths. By copying the essential verification logic into a deterministic test pattern, the system can automatically execute comprehensive critical path testing without being constrained by the random nature and time limitations of LBIST, thereby maintaining high automation while achieving complete critical path coverage.

Inventive Principle:

Principle #26Copying

Data Source

PatentUS7895029B2System and method of automating the addition of RTL based critical timing path counters to verify critical path coverage of post-silicon software validation tools

Publication Date: 2011.02.22 SIEMENS INDUSTRY SOFTWARE INC

AI summary

A system and method for modifying a simulation model and optimizing an application program to produce valid hardware-identified operating conditions that are matched with simulator-identified operating conditions in order to modify a simulator accordingly is presented. A critical path coverage analyzer includes critical path measurement logic into a simulation model that injects errors into the critical path and provides visibility into the number of times that an application program exercises the critical path. The critical path coverage analyzer uses the critical path measurement logic to optimize an application program to adequately exercise and test the critical paths. Once optimized, the critical path coverage analyzer runs the optimized application program on a hardware device to produce hardware-identified operating conditions. The hardware-identified operating conditions are matched against simulator-identified operating conditions. When discrepancies exist, the simulator is modified accordingly to match the hardware-identified operating conditions.