Cross-Chip Link Corrupt Data Tagging via Virtual Channel Queues
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Solution Overview
Problem
Current computer systems face challenges in efficiently tagging corrupt data on cross-chip links, leading to increased latency and reduced transmission integrity due to the separation of data and bad data indicators during transmission.
Innovation Solution
The method involves receiving a control flit with a virtual channel identifier, storing it in data and bad data indicator pipelines, and moving the corresponding data and bad data indicators into virtual channel queues and arrays, respectively, to enable efficient association and processing of data across the cross-chip link.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data and bad data indicators are transmitted separately on cross-chip links, then transmission bandwidth is utilized, but latency increases and transmission integrity deteriorates
Solution Approach 1:
The patent merges data flits and bad data indicators into a unified transmission structure where bad data indicators are embedded within the data transmission stream. Specifically, bad data indicators are placed in bookend flits that frame sequences of data flits, allowing simultaneous transmission of both data and integrity information without requiring separate channels, thereby reducing latency while maintaining transmission integrity.
Solution Approach 2:
The patent applies preliminary action by pre-tagging data flits with bad data indicators before transmission. The source side prepares bookend flits containing bad data indicators in advance and transmits them alongside data flits. This preliminary preparation allows the destination side to immediately process and associate bad data indicators with corresponding data without waiting for separate indicator transmissions, thus reducing overall latency.
2Productivity
If data flits are processed sequentially after reception, then processing accuracy is maintained, but processing speed decreases
Solution Approach 1:
The patent applies preliminary action by pre-establishing virtual channel queues at the destination side before data arrival. These queues are organized according to virtual channel identifiers, allowing incoming data flits to be immediately routed to the correct queue based on their identifier. Bad data indicators are also pre-positioned in bookend flits, enabling immediate association with corresponding data flits upon reception, thus enabling parallel processing while maintaining accurate data-indicator association.
Solution Approach 2:
The patent segments the data transmission stream into virtual channels, each with its own queue. Data flits are divided and routed to different virtual channel queues based on their virtual channel identifiers. This segmentation allows parallel processing of multiple data streams simultaneously while maintaining the integrity of each individual stream's association with its bad data indicators, thereby increasing overall processing speed without sacrificing accuracy.
Data Source
AI summary
Low latency corrupt data tagging on a cross-chip link including receiving, from the cross-chip link, a control flit comprising a virtual channel identifier for an incoming data flit; storing the virtual channel identifier in a data pipeline and a bad data indicator (BDI) pipeline; receiving, from the cross-chip link, the incoming data flit into the data pipeline; moving, based on the virtual channel identifier in the data pipeline, the data flit from the data pipeline into an entry in a virtual channel queue corresponding to the virtual channel identifier; receiving, from the cross-chip link, a BDI for the data flit into the BDI pipeline; and moving, based on the virtual channel identifier in the BDI pipeline, the BDI for the data flit from the BDI pipeline into an entry in a BDI array corresponding to the entry in the virtual channel queue storing the data flit.