Cross-conduction Detector for Switching Regulator Timing
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Solution Overview
Problem
Cross-conduction in switching regulators due to overlapping high-side and low-side switch signals leads to current spikes and voltage transients, degrading switch reliability and efficiency, and existing solutions require external routing of signals for testing, increasing costs and noise susceptibility.
Innovation Solution
An integrated circuit with a detector monitoring both rising and trailing edges of high-drive and low-drive signals to determine timing overlap, generating a detection signal for internal processing to adjust dead-time and prevent cross-conduction, reducing the need for external signal routing and minimizing noise introduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dead-time is increased to prevent signal overlap, then cross-conduction is avoided, but switching regulator efficiency decreases
Solution Approach 1:
The dead-time is made dynamic rather than fixed. The detector continuously monitors the actual timing overlap between HDRV and LDRV signals and adjusts the dead-time duration in real-time based on the specific operating conditions and signal characteristics, allowing minimal dead-time to be used when possible while still preventing cross-conduction
Solution Approach 2:
A feedback mechanism is implemented where the detector monitors the actual drive signals and provides information about timing overlap to the control logic, which then adjusts the dead-time accordingly. This closed-loop approach ensures cross-conduction prevention while optimizing efficiency by using only the necessary dead-time
2Measurement precision
If HDRV and LDRV signals are routed external to the IC for testing, then timing overlap can be measured, but IC cost increases and noise is introduced
Solution Approach 1:
The timing detection function is extracted from external test equipment and implemented as an integrated detector within the IC itself. This internal detector monitors the HDRV and LDRV signals directly at their source, eliminating the need to route these signals externally for measurement purposes
Solution Approach 2:
The IC performs its own self-diagnosis by incorporating an internal detector that automatically monitors its own drive signals for timing overlap. This self-service approach eliminates the need for external observation and testing infrastructure
Data Source
AI summary
An integrated circuit includes a detector configured to monitor a high-drive signal and a low-drive signal that drives a high-side switch and a low-side switch respectively of an integrated circuit switching regulator. The detector monitors both the rising edge and the trailing edge of each of the high-drive and the low-drive signals respectively to determine a timing overlap between the signals and generates a detection signal indicating a dead-time value proportional to the presence or absence of the timing overlap between the signals. An output circuit can be configured to process the detection signal from the detector to enable a correction of the timing overlap between the signals if timing overlap is detected.