Continuous-Time Cross-Correlator for Clockless Symbol Detection

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Solution Overview

Problem

Current symbol detectors in Direct Sequence Spread Spectrum (DSSS) or Code Division Multiple Access (CDMA) systems require accurate clock synchronization, leading to high power consumption and size limitations, making them inefficient for battery-powered wireless communication devices.

Innovation Solution

A continuous time cross-correlator that uses a quantizer, delay line, and continuous time counter to process signals in continuous time, eliminating the need for high-speed clocks and digital signal processing, thereby reducing power consumption and size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If accurate clock synchronization is used in symbol detectors, then symbol detection reliability is improved, but power consumption increases and device size increases

Engineering Contradiction:
Improvesymbol detection reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces the traditional clock-synchronized digital signal processing system with a continuous-time correlation system. Instead of using high-frequency clocks and digital samplers, the invention uses continuous-time analog correlation to detect symbols, thereby eliminating the need for power-consuming clock synchronization mechanisms while maintaining detection reliability

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention changes the operating parameter from discrete-time sampling (requiring high-frequency clocks) to continuous-time processing. By operating in continuous time without sampling, the system avoids the power consumption associated with high-speed clock generation and digital signal processing, thus resolving the contradiction between reliability and power usage

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If high-speed clocks are used for sampling and processing, then symbol detection accuracy is improved, but device size increases and power consumption increases

Engineering Contradiction:
Improvesymbol detection accuracyVSAvoiddevice size
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent substitutes high-speed digital sampling and processing hardware with continuous-time analog correlation circuitry. This replacement eliminates the need for large digital signal processors and high-speed memory systems, significantly reducing device size while preserving symbol detection accuracy through continuous-time processing

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention extracts and removes the high-speed clock generation and digital sampling components from the system architecture. By taking out these power-consuming and area-intensive components, the system achieves accurate symbol detection through simpler continuous-time correlation, thereby reducing overall device size

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If digital signal processing is used for symbol detection, then detection reliability is improved, but power consumption increases

Engineering Contradiction:
Improvedetection reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces digital signal processing with continuous-time analog correlation. Instead of converting signals to digital form and processing them with power-consuming DSP algorithms, the system performs correlation directly in the continuous-time domain using analog circuits, thereby maintaining detection reliability while dramatically reducing power consumption

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8941431B2Continuous time cross-correlator
Publication Date: 2015.01.27 NOVELDA AS
  • US8941431B2 patent drawing
  • US8941431B2 patent drawing
  • US8941431B2 patent drawing

AI summary

There is provided a continuous time cross-correlator comprising: a quantizer for quantizing the incoming signal into discrete levels; a delay line comprising one or more delay units separating a plurality of delay line taps; for each of said delay line taps, a comparator for comparing the signal level of the delay line tap with a correlation value; a continuous time counter for taking the outputs of the plurality of comparators as its inputs, counting the results of the comparisons and outputting the results of the comparisons; and an output comparator for comparing the counter output with a threshold value. The cross-correlator provides for high speed continuous time cross-correlation with low power consumption and a small chip area. Methods of continuous time cross correlation are also provided.