Cross-Coupled Frequency Tripler for Harmonic Suppression

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Solution Overview

Problem

Current frequency tripler circuits for millimeter-wave applications face challenges in suppressing undesired harmonics, particularly at the mm-wave range, due to parasitic structures and low quality factor of passive components, leading to limited tuning range and phase noise, and excessive power consumption.

Innovation Solution

A tripler circuit design featuring a pair of cross-coupled bipolar transistors with a specific polynomial trans-characteristic and an envelope detector to generate a DC offset voltage, which effectively suppresses the fundamental frequency and harmonics, achieving improved harmonic rejection ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a class-C biased transistor is used to generate harmonic-rich current in a frequency tripler, then the desired third harmonic component is enhanced, but the fundamental frequency suppression remains insufficient (only up to 20 dB)

Engineering Contradiction:

Improvethird harmonic output powerVSAvoidfundamental frequency leakage

Core Design Contradiction:

PowerVSObject-generated harmful factors

Solution Approach 1:

The patent divides the frequency tripler circuit into two independent stages: a class-C biased transistor stage for generating harmonic-rich current, and a separate injection-locked oscillator stage for selecting and suppressing the fundamental frequency. This segmentation allows each stage to optimize its function without compromising the other, achieving both high third harmonic output and superior fundamental suppression.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces an injection-locked oscillator as an intermediary component between the class-C transistor and the output. This oscillator acts as a mediator that selectively amplifies the third harmonic while simultaneously suppressing the fundamental frequency through its locking mechanism, achieving over 40 dB suppression that neither stage could achieve alone.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Speed

If traditional frequency dividers are used in the PLL at mm-wave range, then the desired frequency multiplication is achieved, but excessive power consumption occurs

Engineering Contradiction:

Improvefrequency multiplication capabilityVSAvoidpower consumption

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The patent replaces the traditional mechanical frequency divider approach with an electronic injection-locked oscillator mechanism. This substitution eliminates the need for complex frequency division circuits that consume excessive power at mm-wave frequencies, achieving efficient frequency multiplication through the oscillator's natural locking behavior.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Ease of manufacture

If passive components with low quality factor are used in silicon technology at mm-wave range, then the circuit can be integrated, but the tuning range and phase noise performance are severely degraded

Engineering Contradiction:

Improveintegration capabilityVSAvoidphase noise performance

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The injection-locked oscillator is designed to self-correct for the low quality factor of passive components. Through its feedback and locking mechanism, the oscillator automatically compensates for losses and instability introduced by low-Q passive components, maintaining stable frequency output and acceptable phase noise performance without requiring high-quality external components.

Inventive Principle:

Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed tripler circuit achieves significant suppression of the fundamental frequency, with output power at the tripled frequency being 40 dB higher than the sum of the fundamental and fifth harmonic powers across a wide input power range, while maintaining low power consumption.

Implementation Method 1

an envelope detector to generate a DC offset voltage, which effectively suppresses the fundamental frequency and harmonics

Methodology Applied

Scientific EffectEnvelope detection:

Data Source

PatentUS11271552B2Electronic circuit for tripling frequency

Publication Date: 2022.03.08 STMICROELECTRONICS SRL

AI summary

In an embodiment, a circuit for tripling frequency is configured to receive an input voltage (Vin) having a sinusoidal shape and a base frequency. The circuit has a first and a second transistor pair that are cross-coupled, and a trans-characteristics f(Vin) approximating a polynomial nominal trans-characteristic given byf⁡(Vin)=(3A⁢Vin-4A3⁢Vin3)⁢gmwhere A represents an amplitude of the input voltage and gm is a transconductance of transistors of the first and second transistor pairs.