Cross-Coupled Circuit Layout Using Collinear Gate Layers
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Solution Overview
Problem
The existing layout solutions for cross-coupled circuits in integrated circuits face challenges in accurately forming rectilinear gate layers and bridging conductors as device geometries shrink, particularly at 45 nm and below, due to difficulties in lithography and increased spacing requirements.
Innovation Solution
The proposed solution involves a layout where gate layers are formed as collinear structures, with a bridging conductor connecting outermost gate layers, allowing for cross-coupling of signals without requiring rectilinear forms, thus simplifying the manufacturing process and maintaining efficiency in polysilicon pitch usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If rectilinear gate layers and bridging conductors are used to accommodate cross-coupled circuits, then the cross-coupling function is achieved, but the manufacturing precision deteriorates as device geometries shrink to 45 nm and below
Solution Approach 1:
The patent replaces rectilinear gate layers with curved or circular gate layers that overlap the diffusion regions. This curvature eliminates the lithography difficulties associated with sharp rectilinear corners at small geometries, while still achieving the required cross-coupling function through the curved overlapping structure.
Solution Approach 2:
The patent transitions from a planar rectilinear layout to a three-dimensional curved layout where gate layers wrap around or overlap diffusion regions in a curved manner. This dimensional change allows the circuit to maintain functionality while avoiding the manufacturing precision issues of rectilinear structures at small scales.
2Adaptability or versatility
If rectilinear gate layers and bridging conductors are used to accommodate cross-coupled circuits, then the cross-coupling function is achieved, but the device complexity increases due to spacing requirements
Solution Approach 1:
The patent merges the gate layer structure with the diffusion region layout by having curved gate layers directly overlap the diffusion regions. This integration eliminates the need for separate bridging conductors and reduces spacing requirements, simplifying the overall device structure while maintaining cross-coupling functionality.
Data Source
AI summary
A circuit 32 is provided comprising a first diffusion region 34 and a parallel second diffusion region 36. A sequence of N gate layers 40, 42, 46 is provided with a first and an Nth of these gate layers covering different respective ones of the diffusion regions 34, 36 whilst the middle (N−2) gate layers 42 cover both diffusion regions 34, 36. A bridging conductor 64 connects the first gate layer 40 and the Nth gate layer 46. In some embodiments, the second diffusion region is provided as two second diffusion sub-regions 68, 70 having a diffusion region gap 74 therebetween and electrically connected via a jumper connector 42. A first gate layer 76 which forms a gate electrode with a first diffusion region 66 can extend through this diffusion region gap 74 not forming a gate electrode therewith and facilitating use of a collinear bridging conductor 82 to connect to the Nth gate layer 80.