Cross-Coupled PCIe Switches for Balanced I/O Access
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Solution Overview
Problem
Current computer systems with cross-coupled PCIe switches face issues of unequal and dependent access to I/O devices among multiple microprocessor complexes, leading to workload imbalances and vulnerability to failures, as existing mechanisms do not efficiently distribute ownership and provide balanced, independent access.
Innovation Solution
A system of cross-coupled PCIe switches using non-transparent ports with a recursive address map to create multiple paths for I/O devices to access microprocessor complexes, distributing ownership and enabling direct memory access, thereby providing balanced and independent access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a single microprocessor complex controls all I/O devices through a non-transparent port, then centralized control is achieved, but workload imbalance and vulnerability to failure occur
Solution Approach 1:
The patent segments the control of I/O devices by distributing ownership to multiple microprocessor complexes. Each complex is assigned specific I/O devices through the cross-coupled PCIe switch fabric, eliminating the single-point control bottleneck and improving system reliability through redundancy.
Solution Approach 2:
The patent implements local quality by allowing each microprocessor complex to have direct, independent access to its assigned I/O devices through dedicated PCIe switch paths. This localizes control and access rights, reducing workload imbalance while maintaining reliable operation even if other complexes fail.
2Device complexity
If I/O devices are accessed through a single PCIe switch, then simple architecture is maintained, but access imbalance and dependency issues arise
Solution Approach 1:
The patent merges multiple PCIe switches into a cross-coupled fabric that provides both simple unified access and balanced distribution. The switches are interconnected through non-transparent ports to create redundant paths, achieving architecture simplicity while eliminating access imbalances through the distributed switch network.
Solution Approach 2:
The patent adds another dimension to the PCIe architecture by creating a two-dimensional cross-coupled switch fabric. This allows I/O devices to be accessed through multiple independent paths across different switches, maintaining architectural simplicity while achieving balanced access through the expanded dimensional structure.
3Adaptability or versatility
If non-transparent ports are used for cross-coupling, then inter-complex communication is enabled, but address mapping complexity increases
Solution Approach 1:
The patent uses the PCIe switch fabric as an intermediary to manage address mapping between microprocessor complexes. The switches handle the complexity of address translation and routing, allowing transparent inter-complex communication while isolating the complexity from the microprocessor complexes themselves.
Solution Approach 2:
The patent employs parameter changes in the address space through the non-transparent ports, where address ranges are dynamically assigned and mapped across different microprocessor complexes. This allows versatile inter-complex communication while the PCIe switch infrastructure manages the mapping complexity through standardized address translation parameters.
Data Source
AI summary
A plurality of PCIe switch complexes are interposed between a plurality of I/O devices and a plurality of microprocessor complexes. Each PCIe switching complex comprises a plurality of PCIe switches wherein each switch possesses at least one non-transparent port. The non-transparent port is used to cross-couple each PCIe switch creating an active matrix of paths between the HBAs associated with each I/O device and each microprocessor. The paths between each HBA (I/O device) and each microprocessor are mapped using a recursive algorithm providing each I/O device with direct memory access to each microprocessor.


