Cross-Domain Data Retention Circuit With Independent Retention Latch
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Solution Overview
Problem
Existing data retention circuits face challenges in efficiently retaining data bits across power domains with different voltage levels, leading to limitations in energy conservation and flexibility in circuit applications and IC layout.
Innovation Solution
A data retention circuit is designed with a master latch, slave latch, and retention latch operating in separate power domains, utilizing a second power supply voltage level independent of the first, along with a level shifter to shift logical levels between domains, enabling data retention during power down modes and enhancing flexibility in circuit applications and IC layout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data bits are saved using latch circuits during power down events, then data continuity is maintained, but power consumption increases and battery life is reduced
Solution Approach 1:
The circuit is divided into two separate power domains: a first power domain for the master and slave latches, and a second power domain for the retention latch. This segmentation allows independent power management, enabling the retention latch to maintain data using a second power supply voltage while the first power domain can be completely powered down, thus maintaining data continuity while reducing overall power consumption.
Solution Approach 2:
A level shifter circuit acts as an intermediary between the first power domain (master/slave latches) and the second power domain (retention latch). The level shifter translates logical levels from the first power supply voltage to the second power supply voltage, enabling data transfer between domains with different voltage levels while allowing independent power management of each domain.
2Reliability
If traditional latch circuits are used for data retention, then data is saved during power down, but flexibility in circuit applications and IC layout is limited
Solution Approach 1:
By separating the retention function into an independent second power domain with a dedicated retention latch, the circuit architecture becomes more flexible. The retention latch can be positioned independently from the master and slave latches, allowing greater freedom in IC layout design and various circuit application configurations while maintaining reliable data retention functionality.
3Device complexity
If a single power supply voltage is used for all latches, then circuit design is simplified, but power conservation during idle periods is compromised
Solution Approach 1:
The circuit is segmented into two power domains with different power supply voltages. The first power domain contains the master and slave latches and can be completely powered down during idle periods. The second power domain contains the retention latch that remains powered using a second power supply voltage, enabling power conservation while maintaining data retention capability.
Solution Approach 2:
The patent changes the power supply voltage parameter by introducing a second power supply voltage distinct from the first. This allows the retention latch to operate at a different voltage level, enabling it to maintain data with minimal power consumption while the first power domain can be completely shut down, achieving both power conservation and data retention.
Data Source
AI summary
A circuit includes first and second power domains. The first power domain has a first power supply voltage level and includes a master latch, a first level shifter, and a slave latch coupled between the master latch and the first level shifter. The second power domain has a second power supply voltage level different from the first power supply voltage level and includes a retention latch coupled between the slave latch and the first level shifter, and the retention latch includes a second level shifter.