Cross-Gate Contact Interconnect for Dense MOSFET Active Regions
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Solution Overview
Problem
As semiconductor devices become highly integrated, the scaling down of MOSFETs leads to deteriorating operating characteristics, necessitating superior performance manufacturing while overcoming integration limitations.
Innovation Solution
A semiconductor device design incorporating a substrate with active regions, device isolation layers, gate structures, active contact patterns, and connection patterns, where the connection pattern extends across the gate structure to connect active contact patterns between regions, reducing electrical resistance and capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If MOSFETs are scaled down for high integration, then device density increases, but operating characteristics deteriorate
Solution Approach 1:
The patent transitions from planar 2D MOSFET channels to three-dimensional nanosheet channels stacked vertically. This dimensional change allows multiple channels to occupy a smaller footprint area while maintaining adequate channel length and control, thereby increasing device density without proportionally scaling down individual transistor dimensions and preserving operating characteristics.
Solution Approach 2:
Multiple nanosheet channels are nested vertically within a single device footprint, with each nanosheet forming a separate conducting channel. This nesting approach enables parallel current flow through multiple channels while maintaining effective gate control over each channel, achieving high integration without sacrificing transistor performance.
2Reliability
If connection patterns extend across gate structures to reduce resistance, then electrical connection improves, but device complexity increases
Solution Approach 1:
The connection pattern is segmented into multiple portions, with each portion connecting to specific nanosheet channels. This segmentation allows selective electrical connection to individual channels or groups of channels, enabling flexible circuit design while managing complexity through modular connection approaches rather than requiring comprehensive interconnection of all channels.
Data Source
AI summary
A semiconductor device includes a substrate that includes a first active region and a second active region, a device isolation layer between the first active region and the second active region, a gate structure that extends in a first direction and runs across the first active region and the second active region, a first active contact pattern on the first active region on one side of the gate structure, a second active contact pattern on the second active region on another side of the gate structure, and a connection pattern that is on the device isolation layer and connects the first active contact pattern and the second active contact pattern to each other. The connection pattern extends in a second direction and runs across the gate structure. Portions of the first active contact pattern and the second active contact pattern extend in the first direction and overlap the device isolation layer.