Cross-hierarchy Antenna Condition Verification for IC Design

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Solution Overview

Problem

The antenna effect, which causes charge accumulation and damage during plasma etching in integrated circuit manufacturing, is difficult to identify and address in hierarchical integrated circuit designs, as it may not be apparent until the design is fully constructed and flattened.

Innovation Solution

A cross-hierarchy antenna condition verification method that analyzes connection characteristics between child and parent macros, calculates antenna conditions, and adjusts the design to remove violations before fabrication, using shape information files to facilitate route analysis and design adjustments across multiple layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If hierarchical design is used to simplify design and testing tasks, then design flexibility and ease of manufacture are improved, but antenna effect violations become harder to detect and measure

Engineering Contradiction:
Improvedesign flexibilityVSAvoidantenna effect detection
Core Design Contradiction:
Ease of manufactureVSDifficulty of detecting and measuring

Solution Approach 1:

The patent applies preliminary action by performing antenna condition verification during the hierarchical design stage before the design is flattened and fabricated. The verification tool proactively checks connection characteristics (metal area, via area, gate area) of routes between macros to identify potential antenna violations early, allowing designers to correct issues before they become apparent during manufacturing or final testing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the verification process into hierarchical levels, analyzing routes between individual macros and cells separately before integrating them into the full design. This segmentation allows the verification tool to manage complexity by processing antenna conditions at manageable units (macros and cells) rather than attempting to verify the entire flattened design at once.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If design verification is performed after flattening the hierarchical design, then measurement precision is improved, but loss of time increases

Engineering Contradiction:
Improveantenna condition verification accuracyVSAvoidverification timing
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs antenna verification preliminarily during the hierarchical design phase, before the design is flattened and before fabrication. This early verification timing allows designers to identify and correct antenna violations while the design structure is still flexible, avoiding the time loss that would result from discovering issues only after flattening or during manufacturing.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If individual macros or cells are examined separately, then ease of operation is improved, but antenna effect identification becomes more difficult

Engineering Contradiction:
Improvedesign review simplicityVSAvoidantenna violation identification
Core Design Contradiction:
Ease of operationVSDifficulty of detecting and measuring

Solution Approach 1:

The patent merges the verification of individual macros with the analysis of intermacro routes. The verification tool examines connection characteristics (metal area, via area, gate area) of routes connecting macros to determine antenna conditions. This combining approach allows the tool to identify antenna violations that arise from intermacro connections while maintaining the modular hierarchical structure, making both ease of operation and accurate detection achievable simultaneously.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11941340B2Cross-hierarchy antenna condition verification
Publication Date: 2024.03.26 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11941340B2 patent drawing
  • US11941340B2 patent drawing
  • US11941340B2 patent drawing

AI summary

Aspects of the invention include methods, systems, and computer program products for integrated circuit development using cross-hierarchy antenna condition verification. A method includes obtaining a design of a hierarchical macro distributed between multiple files for an integrated circuit and analyzing, by a design verification tool, a route between at least one child macro and at least one pin of the hierarchical macro as defined in the files. The method further includes determining, by the design verification tool, a plurality of connection characteristics of the at least one child macro and the at least one pin forming the route and calculating, by the design verification tool, an antenna condition for the route based on the connection characteristics. The design of the hierarchical macro is adjusted to remove a violation of an antenna rule based on determining that the antenna condition of the route violates the antenna rule.