Cross-IC Debug Monitoring Through Incremental FPGA Reconfiguration

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Solution Overview

Problem

Traditional debug networks in programmable logic devices (PLDs) are intrusive, resource-intensive, and inefficient, requiring downtime and recompilation, and often fail to provide meaningful debug data, leading to wasted resources and manual data parsing.

Innovation Solution

A non-intrusive monitoring and control system that allows unobtrusive full read access to running user designs for rapid-response monitoring and debugging, using a configuration and monitoring network that operates independently of the primary circuit structure, enabling incremental configuration updates and data retrieval without disrupting the user design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If debug network is implemented using configurable circuits of PLD, then debug functionality can be integrated, but PLD resources are consumed leaving fewer resources for user design

Engineering Contradiction:
Improvedebug functionality integrationVSAvoidPLD resources
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent divides the PLD into two separate circuit structures: a primary circuit structure for user design and a secondary circuit structure for debug network. This segmentation allows independent resource allocation where the secondary circuit structure uses dedicated configurable circuits exclusively for debugging, preventing resource contention with the user design while enabling full debug functionality integration.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If debug network functionality is changed, then debugging capability is improved, but entire IC design must be recompiled and downloaded

Engineering Contradiction:
Improvedebug network functionalityVSAvoidrecompilation and download time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent implements dynamic reconfigurability in the secondary circuit structure, allowing the debug network to be reconfigured at runtime without requiring full IC recompilation. The configurable circuits in the secondary structure can be modified independently through configuration memory updates, enabling flexible debugging capability changes while minimizing disruption to the overall system operation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

By separating the debug network into an independent secondary circuit structure with its own configurable circuits and configuration memory, the patent enables isolated modification of debug functionality. Changes to the debug network only affect the secondary structure and do not require recompilation of the primary user design, significantly reducing the time and effort needed for debugging updates.

Inventive Principle:
Principle #1Segmentation

3Reliability

If fixed-function circuitry is used for debug network, then debug functionality is available, but resources are dedicated whether or not needed

Engineering Contradiction:
Improvedebug functionality availabilityVSAvoiddedicated resource usage
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent implements dynamic configurability in the secondary circuit structure, allowing the debug network resources to be activated or deactivated based on actual debugging needs. The configurable circuits can be programmed to perform different functions or remain idle, enabling the system to allocate resources dynamically rather than having permanently dedicated fixed-function circuitry, thus reducing energy consumption when debug functionality is not required.

Inventive Principle:
Principle #15Dynamics

4Adaptability or versatility

If debug network is implemented, then debugging capability is enhanced, but extensive regression testing and verification is required

Engineering Contradiction:
Improvedebug capabilityVSAvoidtesting and verification requirements
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

By separating the debug network into an independent secondary circuit structure with dedicated configurable circuits, the patent isolates the complexity of debug functionality from the primary user design. This segmentation allows the debug network to be tested and verified independently, reducing the scope of regression testing required compared to integrated approaches where debug and user logic are intertwined.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9558090B2Non-intrusive monitoring and control of integrated circuits
Publication Date: 2017.01.31 ALTERA CORP
  • US9558090B2 patent drawing
  • US9558090B2 patent drawing
  • US9558090B2 patent drawing

AI summary

A method of monitoring operations of a set of ICs. The method loads a first set of configuration data into a first IC for configuring a group of configurable circuits of the first IC to perform operations of a user design. The method receives a definition of an event based on values of a set of signals in the user design and a set of corresponding actions to take when the event occurs. The set of signals includes at least one signal received from a second IC. The method generates an incremental second set of configuration data based on the definition of the event and the set of corresponding actions. While the first IC is performing the operations of the user design, the method loads the incremental second set of configuration data into the first IC and monitors the signals received from the second IC at the first IC.