Cross-ISA Procedure Calls for Heterogeneous Processors
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Solution Overview
Problem
Generating code for heterogeneous multiprocessors with different instruction set architectures is complex due to the need to handle binary incompatible cores and transition between them, making it difficult for programmers to focus on functional correctness using conventional high-level computer languages.
Innovation Solution
A method involving compiling an application to create CPU instruction set architecture objects, pruning unnecessary functions, inserting remote procedure calls, and renaming sections to create a common application library for heterogeneous processors, allowing seamless transitions between processors while maintaining a coherent programmer view.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If code is compiled separately for each heterogeneous processor core with unique instruction set architectures, then each core can execute optimized native code, but the complexity of handling procedure calls and transitions between binary incompatible cores increases significantly
Solution Approach 1:
The patent introduces a binary translation layer that acts as an intermediary between heterogeneous processor cores. This translation layer converts instructions from one instruction set architecture to another, enabling procedure calls and transitions between binary incompatible cores without requiring separate optimized code compilation for each core type. The mediator handles the complexity of cross-ISA communication, allowing programmers to focus on functional correctness using conventional high-level languages.
2Reliability
If programmers use conventional high-level computer languages with threading primitives, then functional correctness can be focused on, but the underlying complexity of heterogeneous processor transitions and binary incompatibility must still be managed
Solution Approach 1:
The binary translation layer implements self-service by automatically detecting and translating instruction set architecture differences without requiring explicit programmer intervention. The system autonomously handles procedure call translations, register state management, and memory address space translations between heterogeneous cores, shielding programmers from the underlying complexity while maintaining functional correctness through automated binary compatibility management.
3Speed
If separate binary incompatible code is generated for each processor core, then each core can execute natively optimized instructions, but procedure calls between different cores require complex translation and state management
Solution Approach 1:
The patent segments the code execution model into distinct translation regions and native execution regions. Each heterogeneous core maintains its native instruction set for optimized execution, while the binary translation layer segments the complexity of cross-core communication into manageable translation units. This segmentation allows procedure calls to be handled in discrete translation steps rather than requiring complete rewrite of the entire execution model, simplifying the management of inter-core procedure calls while preserving native execution speed where applicable.
Data Source
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AI summary
The invention provides a method of initiating code including (i) storing an application having first, second and third functions, the first function being a main function that calls the second and third functions to run the application, (ii) compiling the application to first and second heterogeneous processors to create first and second central processing unit (CPU) instruction set architecture (ISA) objects respectively, (iii) pruning the first and second CPU ISA objects by removing the third function from the first CPU ISA objects and removing first and second functions from the second CPU ISA objects;, (iv) proxy inserting first and second remote procedure calls (RPC's) in the first and second CPU ISA objects respectively, and pointing respectively to the third function in the second CPU ISA objects and the second function in the first CPU ISA objects, and (v) section renaming the second CPU ISA objects to common application library.