Cross-Point Array Memory for Non-Volatile DIMM Data Retention

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Solution Overview

Problem

Conventional dual in-line memory modules (DIMMs) using flash memory face challenges with prolonged data transfer times during power loss and restoration, high energy consumption for operations, and limited endurance, leading to potential data loss and reduced lifespan.

Innovation Solution

Implementing a cross-point array memory in a non-volatile DIMM that performs bit storage based on bulk resistance changes, using a stackable cross-gridded data access array to efficiently save and restore data, reducing the time and energy required for data transfer and increasing endurance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If flash memory is used in conventional DIMMs for non-volatile storage, then data can be retained during power loss, but data transfer times are prolonged and energy consumption is high

Engineering Contradiction:
Improvedata retention during power lossVSAvoiddata transfer time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent changes the fundamental storage mechanism from flash memory to cross-point array memory, which uses bulk resistance changes in phase-change material instead of charge trapping. This parameter change enables faster write speeds and lower energy consumption while maintaining non-volatile data retention capabilities during power loss

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the flash memory storage mechanism with a cross-point array memory mechanism that uses programmable metallization cells or phase-change materials. This substitution eliminates the limitations of flash memory programming times and enables faster data transfer while reducing energy consumption through localized resistance changes

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If flash memory is used in conventional DIMMs for non-volatile storage, then data can be retained during power loss, but energy consumption for read/write operations is high

Engineering Contradiction:
Improvedata retention during power lossVSAvoidenergy consumption for operations
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the storage mechanism to cross-point array memory using bulk resistance changes in phase-change material or programmable metallization cells. This enables lower energy consumption for write operations compared to flash memory, as the resistance change mechanism requires significantly less energy than flash memory programming

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes flash memory with cross-point array memory technology, replacing the charge trapping mechanism with a resistance-based storage mechanism. This substitution reduces energy consumption for read and write operations while maintaining non-volatile data retention during power loss

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If flash memory is used in conventional DIMMs, then non-volatile storage is achieved, but endurance is limited

Engineering Contradiction:
Improvenon-volatile storage capabilityVSAvoidlifespan/endurance
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent replaces flash memory with cross-point array memory, substituting the wear-prone charge trapping mechanism with a more durable resistance-based storage mechanism. This substitution significantly extends the operational lifespan and endurance of the memory module while maintaining non-volatile storage capability

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the storage mechanism to cross-point array memory using bulk resistance changes, which has superior endurance characteristics compared to flash memory. This parameter change enables the memory to withstand significantly more write cycles while maintaining data retention during power loss

Inventive Principle:
Principle #35Parameter changes

4Loss of time

If cross-point array memory is implemented, then data transfer time is reduced and energy consumption is lowered, but manufacturing complexity increases

Engineering Contradiction:
Improvedata transfer timeVSAvoidmanufacturing complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent implements a cross-point array memory structure that uses a three-dimensional cross-gridded architecture instead of planar flash memory. This dimensional change enables faster data access and lower energy consumption while the modular stackable design helps manage manufacturing complexity through standardized building blocks

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The cross-point array memory reduces data transfer times, lowers energy consumption, and extends the lifespan of the DIMM by enabling faster data recovery and more reliable storage with higher endurance.

Implementation Method 1

perform bit storage based on bulk resistance changes

Methodology Applied
Scientific EffectBulk resistance change: Electrical Resistance

Data Source

PatentUS11404092B2Cross point array memory in a non-volatile dual in-line memory module
Publication Date: 2022.08.02 MICRON TECHNOLOGY INC
  • US11404092B2 patent drawing
  • US11404092B2 patent drawing
  • US11404092B2 patent drawing

AI summary

A processing device determines a subset of a plurality of blocks from a volatile memory device of a memory sub-system, retrieves the subset of the plurality of blocks from the volatile memory device, and writes the subset of the plurality of blocks to a non-volatile cross point array memory device of the memory sub-system using a first type of write operation. The processing device further receives an indication of a power loss in the memory sub-system, and responsive to receiving the indication of the power loss, writes a remainder of the plurality of blocks to the non-volatile cross point array memory device using a second type of write operation.