Cross-Point Memory Concurrent Cell Access for Higher Bandwidth
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Solution Overview
Problem
Existing cross-point memory arrays face challenges in accurately accessing multiple memory cells simultaneously, limiting read/write bandwidth and array efficiency.
Innovation Solution
A control circuit is used to concurrently access multiple selected memory cells in a cross-point array by applying a select voltage to a bit line and driving an access current through each selected word line, allowing for simultaneous access to multiple memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple memory cells are accessed simultaneously in a single cross-point array, then bandwidth is improved, but access accuracy deteriorates due to difficulty in accurately accessing more than one memory cell at a time
Solution Approach 1:
The patent segments the memory array into multiple independently controllable banks (first bank, second bank, third bank, fourth bank), each accessible through dedicated word lines and bit lines. This segmentation allows simultaneous access to multiple memory cells across different banks while maintaining access accuracy through independent control of each bank's select lines, resolving the contradiction between improved bandwidth and maintained access accuracy.
2Productivity
If the number of cross-point arrays is increased to achieve higher bandwidth, then bandwidth is improved, but array efficiency deteriorates
Solution Approach 1:
The patent merges multiple banks within a single cross-point array, allowing the system to achieve higher bandwidth through concurrent access to multiple banks (first, second, third, and fourth banks) without increasing the number of separate arrays. This combining approach maintains array efficiency by utilizing a unified array structure while improving productivity through parallel operations across segmented banks within the same array.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves bandwidth by enabling concurrent access to multiple memory cells, allowing for fewer but larger cross-point arrays, and supports bipolar operation in memory technologies like MRAM.
Implementation Method 1
Each memory cell in the array has a programmable resistance that changes in response to application of a bipolar waveform
Data Source
AI summary
Concurrent access of multiple memory cells in a cross-point memory array is disclosed. In one aspect, a forced current approach is used in which, while a select voltage is applied to a selected bit line, an access current is driven separately through each selected word line to concurrently drive the access current separately through each selected memory cell. Hence, multiple memory cells are concurrently accessed. In some aspects, the memory cells are accessed using a self-referenced read (SRR), which improves read margin. Concurrently accessing more than one memory cell in a cross-point memory array improves bandwidth. Moreover, such concurrent accessing allows the memory system to be constructed with fewer, but larger cross-point arrays, which increases array efficiency. Moreover, concurrent access as disclosed herein is compatible with memory cells such as MRAM which require bipolar operation.