Cross-Point Memory Disturb Prevention via Discharge Voltage
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Solution Overview
Problem
In memory devices with cross-point architectures, repeated access to a common conductive line can disturb untargeted memory cells by causing charge buildup, leading to corruption of stored logic values, which necessitates frequent refresh operations and increased power consumption.
Innovation Solution
Applying a discharge voltage with a polarity opposite to the access voltage to the conductive lines after an access operation to reduce charge stored in untargeted memory cells, or instituting a delay before subsequent access attempts, thereby preventing disturb and reducing the need for refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If repeated access operations are performed on a common conductive line, then read/write speed is improved, but charge buildup disturbs untargeted memory cells
Solution Approach 1:
A discharge operation is performed before each subsequent access operation to remove accumulated charge from the conductive line. This preliminary action prevents charge buildup from disturbing untargeted memory cells during repeated access operations, enabling high-speed reading while maintaining data integrity.
Solution Approach 2:
The discharge operation converts the harmful effect of charge buildup into a beneficial process by actively removing the accumulated charge. The discharge voltage, applied with opposite polarity to the access voltage, neutralizes the charge that would otherwise disturb untargeted cells, allowing rapid repeated access without interference.
2Reliability
If discharge operations are performed to prevent charge buildup, then reliability is improved, but power consumption increases
Solution Approach 1:
Discharge operations are performed periodically between access operations rather than continuously. The discharge is triggered after a threshold number of access operations or when charge buildup is detected, providing data integrity protection only when necessary and reducing unnecessary power consumption during stable conditions.
Solution Approach 2:
The system monitors charge accumulation on the conductive line and triggers discharge operations based on feedback from this monitoring. By using feedback to determine when discharge is necessary, the system maintains data integrity while avoiding unnecessary discharge operations that would waste energy.
3Reliability
If refresh operations are performed frequently to maintain data integrity, then reliability is improved, but productivity decreases
Solution Approach 1:
The discharge operation is performed as a preliminary action before each access operation to prevent charge buildup. This prevents the need for subsequent refresh operations to correct data corruption, thereby maintaining data integrity without reducing access throughput or productivity.
Solution Approach 2:
The system maintains continuous access capability by performing discharge operations that prevent charge buildup from interrupting operations. This ensures uninterrupted read/write operations while maintaining data integrity, eliminating the need to stop for refresh operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents corruption of untargeted memory cells during repeated access attempts, reducing the need for frequent refresh operations and lowering power consumption by maintaining the integrity of stored data without requiring continuous power refresh.
Implementation Method 1
Applying a discharge voltage with a polarity opposite to the access voltage to the conductive lines after an access operation to reduce charge stored in untargeted memory cells
Data Source
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AI summary
Method for preventing disturb of untargeted memory cells during repeated access operations of ferroelectric memory cells are described for a non-volatile memory array. Multiple memory cells may be in electronic communication with a common conductive line, and each memory cell may have an electrically non-linear selection component. Following a first access operation (e.g., a read or write operation) of a target ferroelectric memory cell, a timer is started so as to institute a delay between access attempts. Based on this timer being expired or exceeding a threshold, a second access operation on a different ferroelectric memory cell may be performed.