Cross-Point Memory Read Margin via Reduced Overdrive Voltage
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Solution Overview
Problem
Cross-point memory arrays with programmable resistance memory cells face challenges in maintaining a sufficient read margin due to variations in the holding current of threshold switching selectors, leading to bit error rates that cannot be corrected by error correction circuitry and potential disturbance of memory cell states during read operations.
Innovation Solution
The implementation of a current-force read technique with a smaller overdrive voltage applied to drive transistors during read operations, combined with floating neighbor word lines to reduce capacitance and lower the holding current of threshold switching selectors, improves read margin without stressing the memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the read current is increased to improve read margin, then the margin between read current and Ihold increases, but the memory cell state may be disturbed resulting in read errors
Solution Approach 1:
The patent changes the voltage parameter by applying a reduced overdrive voltage (Vod) to the drive transistor during read operations. This parameter change allows the read current to be sufficiently high to maintain read margin while being low enough to avoid disturbing the memory cell state, thus resolving the contradiction between improving read margin and preventing read errors.
2Reliability
If the holding current Ihold of threshold switching selector is reduced to improve read margin, then read current can be smaller, but fabrication process limits and variations still reduce read margin
Solution Approach 1:
The patent changes the voltage parameter by applying a reduced overdrive voltage to the drive transistor, which indirectly controls the read current magnitude. This approach avoids direct modification of the threshold switching selector's Ihold (which is constrained by fabrication limits) while still achieving improved read margin through precise voltage control during read operations.
Solution Approach 2:
The drive transistor acts as an intermediary between the read current source and the memory cell. By controlling the overdrive voltage of this intermediary transistor, the system can precisely regulate the read current to be just sufficient for reliable reading without excessive current that would cause read errors, thus mediating the contradiction between read margin and Ihold variation.
3Reliability
If a larger read current is used to ensure threshold switching selector remains on, then read margin improves, but bit error rate increases when cell voltage is too high
Solution Approach 1:
The patent changes the voltage parameter by applying a reduced overdrive voltage to the drive transistor during read operations. This parameter change optimizes the read current magnitude to maintain the threshold switching selector in the on-state (improving read margin) while keeping the cell voltage below the threshold that would cause bit errors, thus resolving the contradiction between read margin and bit error rate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances read margin by reducing the holding current of threshold switching selectors, allowing for a smaller read current to be used, which decreases stress on memory cells and improves bit error correction capabilities.
Implementation Method 1
The threshold switching selector has a high resistance (in an off or non-conductive state) until it is biased to a voltage higher than its threshold voltage (Vt) or current above its threshold current, and until its voltage bias falls below Vhold ('Voffset') or current below a holding current Ihold.
Implementation Method 2
An MRAM cell uses magnetization to represent stored data, in contrast to some other memory technologies that use electronic charges to store data. A bit of data is written to an MRAM cell by changing the direction of magnetization of a magnetic element ('the free layer') within the MRAM cell, and a bit is read by measuring the resistance of the MRAM cell
Data Source
AI summary
Technology for read in a cross-point memory array. Drive transistors pass read and write currents to the cross-point memory array. The read current charges a selected word line to turn on a threshold switching selector of a selected memory cell. While the threshold switching selector is on, the current (read or write) passes through the selected memory cell. The memory system applies a smaller overdrive voltage to a drive transistor when the drive transistor is passing the read current than when the drive transistor is passing the write current. A smaller overdrive voltage increases the resistance of the drive transistor. Increasing the resistance of the drive transistor increases the resistance seen by the threshold switching selector in the selected memory cell, which reduces the Ihold of the threshold switching selector.