Cross-Point Memory Cell With Asymmetric Selection Elements
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Solution Overview
Problem
Memory devices with a cross-point structure face challenges in reducing sneak current, which affects their performance and efficiency, despite the use of selection elements to block unwanted current flows.
Innovation Solution
The implementation of a memory device with a cross-point structure that includes first and second selection elements connected in series and parallel, where the second selection element allows current flow only at specific voltage polarities, effectively reducing sneak current by controlling current flow directions based on set and reset operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a cross-point structure is used in memory devices, then storage capacity and integration density are improved, but sneak current increases
Solution Approach 1:
The memory cell is segmented into multiple functional components: a variable resistance element for data storage and two selection elements (first and second) for current control. This segmentation allows each component to perform its specific function, with the selection elements blocking sneak current paths while the variable resistance element stores data, thereby resolving the contradiction between high density and sneak current.
Solution Approach 2:
The first and second selection elements act as intermediary components between the bit lines and the variable resistance element. These selection elements mediate the current flow by allowing controlled current through the selected memory cell while blocking current through unselected cells, thus eliminating sneak current without compromising the cross-point structure's density advantages.
2Object-generated harmful factors
If selection elements are added to block sneak current, then sneak current is reduced, but device complexity increases
Solution Approach 1:
The first and second selection elements are merged into a single series combination within each memory cell. This merging approach allows both selection elements to work together in blocking sneak current while sharing the same current path, thereby reducing the overall complexity compared to having separate parallel selection mechanisms for each cell.
Solution Approach 2:
The selection elements are strategically positioned at specific locations within the memory cell structure to provide localized current control. By placing the first selection element between the first bit line and the variable resistance element, and the second selection element between the second bit line and the variable resistance element, the design achieves precise local control without requiring complex global control mechanisms.
3Productivity
If bidirectional current flow is allowed, then read operation performance is improved, but sneak current increases
Solution Approach 1:
The selection elements dynamically control current flow direction based on the operational mode (read or write). During read operations, the selection elements allow bidirectional current flow for efficient data reading. During write operations, they unidirectionally block current flow to prevent sneak current, thus adapting the current characteristics to the specific operational needs.
Solution Approach 2:
The first and second selection elements exhibit asymmetric current blocking characteristics tailored to their specific positions and functions. The first selection element primarily blocks current from the first bit line during write operations, while the second selection element blocks current from the second bit line, creating an asymmetric blocking pattern that effectively prevents sneak current while maintaining bidirectional read capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces sneak current, enhancing the performance and efficiency of memory devices by minimizing unwanted current flows during set and reset operations, thereby improving overall device performance.
Implementation Method 1
the second selection element includes a diode
Implementation Method 2
a variable resistance element which includes one end coupled to a corresponding second line and the other end coupled to first and second selection elements
Data Source
AI summary
An electronic device includes a semiconductor memory unit. The semiconductor memory unit includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction crossing the first direction, and a plurality of memory cells provided between the first lines and the second lines at intersections of the first lines and the second lines. Each of the memory cells includes a variable resistance element coupled to and disposed between a corresponding second line and first and second selection elements, the first selection element coupled to and disposed between the variable resistance element and a corresponding first line, and the second selection element coupled to and disposed between the variable resistance element and the corresponding first line. The first selection element allows a bidirectional current flow therethrough, and the second selection element allows a unidirectional current flow therethrough.