Cross-Point Memory Write Strength Determination
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Solution Overview
Problem
In cross-point memory arrays, sneak current and resistance variations lead to IR voltage drops, affecting write attempts and resulting in high latency and potential over-voltage damage, as existing methods require iterative write-and-verify cycles to successfully set memory elements to desired values.
Innovation Solution
A system that determines a first write strength by measuring sneak current and address-associated resistance, using equations and look-up tables to calculate a voltage amplitude that compensates for IR voltage drops, thereby reducing the number of write attempts and write latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If iterative write-and-verify cycles are used to set memory elements, then write reliability is improved, but write latency increases
Solution Approach 1:
The patent applies preliminary action by measuring sneak current and resistance before the write operation, then using these measurements to calculate and determine the optimal write strength in advance. This pre-characterization of the memory element's electrical properties allows the system to select an appropriate write voltage level before actually writing, avoiding the need for multiple iterative write-and-verify cycles and thereby reducing write latency while maintaining reliability
2Reliability
If higher write strength is applied to overcome IR voltage drops, then write reliability is improved, but risk of over-voltage damage increases
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the write strength parameter based on measured sneak current and resistance values. Instead of using a fixed high write strength that could cause over-voltage damage, the system calculates the optimal write strength by considering the actual electrical characteristics of each memory element, thereby achieving reliable writes without applying excessive voltage that could damage the memory element
Solution Approach 2:
The patent applies feedback by measuring the sneak current and resistance of each memory element before writing, using these measurements to determine the appropriate write strength. This feedback mechanism allows the system to adapt the write voltage to the specific conditions of each memory element, ensuring sufficient voltage to overcome IR drops while avoiding over-voltage damage through precise, measurement-based control
3Reliability
If multiple write attempts are performed, then write reliability is improved, but power consumption increases
Solution Approach 1:
The patent applies preliminary action by performing sneak current measurement and resistance characterization before the write operation to determine the optimal write strength in advance. This pre-assessment allows the system to execute the write operation successfully on the first attempt by using the correctly calculated write voltage, thereby avoiding multiple write attempts and the associated increased power consumption
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces write latency and power consumption by determining an optimal initial write strength that effectively sets memory elements without overshooting, improving the reliability and longevity of memory elements in cross-point arrays.
Implementation Method 1
sneak current measurement received and resistance identified, determine a first write strength based on the sneak current measurement and the resistance
Implementation Method 2
determine a first write strength for writing the desired memory value to the target memory element based on the sneak current measurement and the resistance. The first write strength may be determined to have a voltage amplitude that compensates for an IR voltage drop
Data Source
AI summary
Example implementations relate to writing a desired memory value to a target memory element in a cross-point array of memory elements. For example, a desired memory value for the target memory element may be received, and a sneak current measurement for the target memory element may be received. A first write strength for writing the desired memory value to the target memory element may be determined based on the sneak current measurement.