Cross-Point MRAM Array Self-Aligned Patterning for Dense Cell Integration
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Solution Overview
Problem
Existing magnetic memory devices face challenges in efficiently integrating selector elements and magnetic tunnel junctions in a cross-point MRAM array, leading to suboptimal performance and scalability.
Innovation Solution
A method of forming a memory device involving the creation of a two-dimensional array of selector-containing pillar structures and magnetic tunnel junctions, with precise patterning and dielectric spacers to optimize the layout and alignment of these components, enabling efficient integration and improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional patterning methods are used to integrate selector elements and magnetic tunnel junctions, then the manufacturing process is simpler, but the integration efficiency and scalability are reduced
Solution Approach 1:
The patent applies preliminary action by forming dielectric spacers around selector-containing pillar structures before patterning the magnetic tunnel junction array. This pre-positioning of spacers establishes precise alignment references that guide subsequent self-aligned patterning steps, enabling efficient integration without requiring complex real-time alignment procedures during manufacturing
Solution Approach 2:
The self-aligned patterning process utilizes the previously formed dielectric spacers as alignment references that automatically guide the patterning of magnetic tunnel junctions. The spacers serve their dual function as both structural elements and alignment markers, eliminating the need for separate alignment procedures and enabling scalable manufacturing
2Productivity
If precise patterning and alignment are implemented to optimize component layout, then integration efficiency improves, but manufacturing complexity increases
Solution Approach 1:
The dielectric spacers are formed in advance around selector-containing pillar structures to establish precise alignment references before the magnetic tunnel junction patterning step. This preliminary positioning enables subsequent self-aligned patterning to achieve optimal component layout without requiring complex real-time alignment systems
Solution Approach 2:
The dielectric spacers act as intermediary structures that mediate between the selector elements and the magnetic tunnel junctions. These spacers provide physical references that enable precise alignment during self-aligned patterning, simplifying the overall manufacturing process while achieving high integration efficiency
3Quantity of substance
If selector elements and magnetic tunnel junctions are integrated in a cross-point array, then memory density increases, but alignment precision requirements become more stringent
Solution Approach 1:
The self-aligned patterning process uses the previously formed dielectric spacers as automatic alignment references. During the patterning of magnetic tunnel junctions, the process automatically aligns to the spacer positions, eliminating the need for high-precision external alignment systems and enabling high-density cross-point array fabrication
Solution Approach 2:
Dielectric spacers are formed around selector-containing pillar structures before the magnetic tunnel junction array patterning. This preliminary action creates a template structure that guides subsequent patterning steps, ensuring precise alignment in high-density cross-point configurations without requiring stringent external alignment controls
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the integration and scalability of selector elements and magnetic tunnel junctions, resulting in improved performance and efficiency of the cross-point MRAM array.
Implementation Method 1
When the spin-polarized current flows through a free layer of a magnetic tunnel junction or a spin valve, the electrons in the spin-polarized current can transfer at least some of their angular momentum to the free layer, thereby producing a torque on the magnetization of the free layer.
Implementation Method 2
Spin-orbit-torque (SOT) MRAM devices use switching of magnetization direction of a free magnetic layer by injection of an in-plane current in an adjacent conductive layer, which is referred to as a spin-orbit-torque (SOT) layer.
Implementation Method 3
A resistance differential of a magnetic tunnel junction between different magnetization states of the free layer can be employed to store data within the magnetoresistive random access memory (MRAM) cell depending if the magnetization of the free layer is parallel or antiparallel to the magnetization of the polarizer layer
Data Source
AI summary
A memory device includes a cross-point array of magnetoresistive memory cells. Each magnetoresistive memory cell includes a vertical stack of a selector-containing pillar structure and a magnetic tunnel junction pillar structure. The lateral spacing between neighboring pairs of magnetoresistive memory cells may be smaller along a first horizontal direction than along a second horizontal direction, and a dielectric spacer or a tapered etch process may be used to provide a pattern of an etch mask for patterning first electrically conductive lines underneath the magnetoresistive memory cells. Alternatively, a resist layer may be employed to pattern first electrically conductive lines underneath the cross-point array. Alternatively, a protective dielectric liner may be provided to protect selector-containing pillar structures during formation of the magnetic tunnel junction pillar structures.