Cross Point MRAM Using Spin Hall MTJ Devices
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Solution Overview
Problem
Conventional spin torque transfer magnetoresistive random access memory (STT-MRAM) faces challenges with high voltage and current-density requirements during programming, leading to cell size limitations and density constraints due to the need for a drive transistor, as well as large write current and voltage demands.
Innovation Solution
The implementation of a cross-point array magnetoresistive random access memory (MRAM) using spin hall magnetic tunnel junction (MTJ) devices with a giant spin Hall Effect (GSHE) mechanism, which enables low programming currents and voltages without the need for a select transistor, utilizing a cross-connected architecture with three metal layers and a GSHE-MTJ stack that includes a free layer, magnesium oxide tunneling oxide, and a synthetic anti-ferromagnet to minimize dipole fields and optimize spin current injection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional STT-MRAM is used, then non-volatile memory function is achieved, but high voltage and current-density requirements increase during programming
Solution Approach 1:
The patent changes the fundamental writing mechanism from spin-torque transfer to spin Hall effect, altering the physical parameters of the MTJ stack (adding heavy metal layers like Pt or Ta adjacent to the free layer) to enable lower voltage and current operation while maintaining reliable writing capability
Solution Approach 2:
The patent introduces a spin Hall effect mediator (heavy metal layer) that converts charge current into spin current more efficiently, reducing the direct current burden on the MTJ and enabling lower programming currents and voltages
2Power
If drive transistor is added to STT-MRAM, then sufficient spin current is provided, but cell size increases
Solution Approach 1:
The patent extracts and eliminates the drive transistor from the bit cell structure by implementing a cross-point array architecture where word lines and bit lines directly control the MTJ devices, removing the need for additional transistors per cell and reducing cell area
Solution Approach 2:
The patent makes the word lines and bit lines multi-functional, serving both as selection signals and as direct current paths for spin current delivery, eliminating the need for dedicated drive transistors
3Ease of operation
If select transistor is included, then memory cell control is improved, but density decreases
Solution Approach 1:
The patent transitions from a planar 1T1MTJ structure to a three-dimensional cross-point array architecture, utilizing vertical stacking and diagonal connectivity to achieve transistor-less control and higher density
Solution Approach 2:
The patent merges the selection and control functions into the line intersection points of the cross-point array, where word lines and bit lines naturally define the selected cell without requiring additional select transistors
4Reliability
If large write current is used, then reliable writing is achieved, but energy consumption increases
Solution Approach 1:
The patent substitutes the direct spin-torque mechanical interaction with a spin Hall effect-mediated mechanism, where the heavy metal layer generates spin current that acts on the MTJ, reducing the energy required for magnetic switching
Solution Approach 2:
The patent changes the material parameters of the MTJ stack, particularly the anisotropy and damping parameters, to enable switching at lower current densities while maintaining reliable writing through the spin Hall effect mechanism
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in higher density and reduced energy consumption per bit, overcoming the limitations of traditional STT-MRAM by eliminating the need for a select transistor and minimizing write disturbances, while maintaining efficient switching times and energy usage.
Implementation Method 1
utilizing a cross-connected architecture with three metal layers and a GSHE-MTJ stack that includes a free layer, magnesium oxide tunneling oxide, and a synthetic anti-ferromagnet to minimize dipole fields and optimize spin current injection
Implementation Method 2
cross point array magnetoresistive random access memory (MRAM) implementing spin hall magnetic tunnel junction (MTJ)-based devices
Data Source
AI summary
Cross point array magnetoresistive random access memory (MRAM) implementing spin hall magnetic tunnel junction (MTJ)-based devices and methods of operation of such arrays are described. For example, a bit cell for a non-volatile memory includes a magnetic tunnel junction (MTJ) stack disposed above a substrate and having a free magnetic layer disposed above a dielectric layer disposed above a fixed magnetic layer. The bit cell also includes a spin hall metal electrode disposed above the free magnetic layer of the MTJ stack.