Cross-Point Memory Pillars Using Sacrificial Caps
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Solution Overview
Problem
The microelectronic industry faces challenges in manufacturing high-performance cross-point memory cells due to difficulties in forming small features using photolithography processes, which are costly and prone to errors, and issues with reversed leakage current, serial resistance, and current-voltage uniformity.
Innovation Solution
A method for forming cross-point memory cells involves creating pillars with sacrificial caps, forming self-aligned openings, and depositing conductive gate lines that completely surround the pillars, allowing for the formation of small memory cells without photolithographic patterning of gate structures, thereby reducing costs and improving control over current-voltage uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography processes are used to pattern small features, then manufacturing precision can be achieved, but manufacturing cost increases and reliability decreases
Solution Approach 1:
The patent applies preliminary action by forming sacrificial mandrels and caps before the final patterning step. The gate electrode is deposited conformally over these sacrificial structures, and the actual pattern is defined by selective removal of sacrificial material rather than direct photolithographic patterning of the gate itself. This preliminary structuring enables precise feature formation without requiring photolithography at the smallest dimensions.
Solution Approach 2:
The patent uses sacrificial mandrels and caps as intermediary structures to enable pattern formation. These temporary structures serve as placeholders that guide the conformal deposition of gate material and are subsequently removed to reveal the final pattern. The intermediary sacrificial structures allow precise patterning through their geometry rather than through direct photolithographic exposure of the gate electrode.
2Length of moving object
If photolithography processes are used to form very small features, then feature size can be reduced, but manufacturing reliability decreases
Solution Approach 1:
The sacrificial mandrels and caps are formed in advance with larger dimensions that are reliably patternable. The gate electrode is then deposited conformally over these pre-formed structures. The critical small features are defined by the geometry of the sacrificial structures and the thickness of the conformal layer, not by direct photolithographic patterning at the smallest scale, thereby improving reliability.
Solution Approach 2:
The patent replaces direct photolithographic patterning of the gate electrode with a mechanical/conformal deposition process. Instead of using light to directly pattern the gate material at very small dimensions, the process uses conformal film deposition over pre-formed sacrificial structures, where the final dimensions are controlled by deposition thickness and sacrificial structure geometry rather than optical resolution limits.
3Manufacturing precision
If photolithography processes are used for patterning, then feature definition can be achieved, but device complexity increases
Solution Approach 1:
The patent segments the patterning process into distinct stages: first forming sacrificial mandrels, then forming sacrificial caps, then depositing gate material conformally, and finally removing sacrificial material. This segmentation allows each step to be optimized independently and simplifies the overall process control compared to attempting to directly pattern all features in a single photolithography step.
Solution Approach 2:
The sacrificial structures serve as intermediaries that simplify the overall patterning process. By using these temporary structures to define the pattern, the process avoids the complexity of direct photolithographic patterning of the gate electrode at very small dimensions. The intermediary structures make the process more manageable and reduce the need for complex photolithography tooling and alignment procedures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the cost-effective fabrication of small cross-point memory cells with improved control over current-voltage characteristics, reducing the need for expensive photolithography equipment and addressing issues of reversed leakage current and serial resistance.
Implementation Method 1
selectively removing the sacrificial cap structure and thereby forming self-aligned openings that expose a top portion of corresponding semiconductor posts
Implementation Method 2
depositing conductive gate lines that completely surround the pillars
Data Source
AI summary
Methods of forming an array of memory cells and memory cells that have pillars. Individual pillars can have a semiconductor post formed of a bulk semiconductor material and a sacrificial cap on the semiconductor post. Source regions can be between columns of the pillars, and gate lines extend along a column of pillars and are spaced apart from corresponding source regions. Each gate line surrounds a portion of the semiconductor posts along a column of pillars. The sacrificial cap structure can be selectively removed to thereby form self-aligned openings that expose a top portion of corresponding semiconductor posts. Individual drain contacts formed in the self-aligned openings are electrically connected to corresponding semiconductor posts.