Cross-Processor Memory Allocation in Heterogeneous Systems

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Solution Overview

Problem

Existing memory management systems in multi-processor environments, especially heterogeneous ones, face challenges in efficiently allocating and releasing memory across different processor architectures, leading to performance limitations and inefficiencies.

Innovation Solution

A computer-implemented method for memory allocation and release that involves a first processor issuing an allocation operation, sending a message to a second processor indicating the allocation, and then releasing the allocated memory upon receiving a free operation from the second processor, even if the processors have different architectures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If each processor performs its own memory management independently, then each processor can manage its memory efficiently, but memory cannot be shared and released across different processor architectures

Engineering Contradiction:
Improvememory management efficiencyVSAvoidcross-processor memory access
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal memory management interface that allows different processor architectures to allocate and release memory from the same memory pool. The memory allocation system is designed to be architecture-agnostic, enabling any processor type to perform both allocation and release operations on memory regardless of which processor originally allocated it.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces message passing as an intermediary mechanism between processors. When one processor needs to release memory allocated by another processor, it sends a message through the message passing interface that carries the release request, enabling indirect memory management across architectural boundaries.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If memory is allocated by one processor and released by the same processor, then memory management is simple, but processor utilization and parallel processing efficiency are limited

Engineering Contradiction:
Improvememory management complexityVSAvoidprocessor utilization
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent separates the memory allocation function from the memory release function, allowing different processors to perform different operations on the same memory pool. This segmentation enables load distribution where some processors can specialize in allocation while others handle release operations, improving overall system throughput.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic memory management where the roles of allocation and release can be performed by different processors depending on system state and workload. This dynamic approach allows flexible load balancing and optimization of processor utilization based on real-time conditions.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If heterogeneous processors access shared memory, then processing capabilities are enhanced, but coordination overhead and synchronization requirements increase

Engineering Contradiction:
Improveheterogeneous processor supportVSAvoidcoordination overhead
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a self-service memory management model where processors autonomously manage their own memory allocations and releases through standardized interfaces. Each processor maintains its own allocation state and can independently release memory by sending appropriate messages, reducing the need for complex centralized coordination mechanisms.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP4322011B1Memory management in a multi-processor environment
Publication Date: 2025.04.02 NEXTSILICON LTD
  • EP4322011B1 patent drawingFigure 1
  • EP4322011B1 patent drawingFigure 2
  • EP4322011B1 patent drawingFigure 3

AI summary

There is provided a computer implemented method of allocation of memory, comprising: issuing an allocation operation for allocation of a region of a pool of a memory by a first process executed on a first processor, sending a message to a second processor indicating the allocation of the region of the pool of the memory, wherein the first processor and the second processor access the region of the pool of the memory, issuing a free operation for release of the allocated region of the pool of the memory by a second process executed on a second processor, and releasing, by the first processor, the allocated region of the pool of the memory as indicated in the free operation, wherein the region of the pool of the memory allocated by the first process and released by the second process is a same region of memory.