Cross-Quad Delta-VBE Voltage Reference Circuit for Low Noise

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Solution Overview

Problem

Existing voltage reference circuits suffer from high noise levels, particularly 1/f noise, which are unacceptable for demanding applications like medical instrumentation.

Innovation Solution

A voltage reference circuit employing cross-quad ΔVBE cells, where the ΔVBE voltages are stacked and summed, and a last stage generates a VBE voltage to cancel out first-order noise and mismatch, resulting in ultra-low 1/f noise in the bandgap voltage output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional bandgap voltage reference circuits are used, then a reference voltage with zero temperature coefficient is achieved, but the noise level (particularly 1/f noise) is unacceptably high

Engineering Contradiction:
Improvenoise levelVSAvoidtemperature coefficient stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The voltage reference circuit is divided into multiple independent ΔVBE cells (first cell, second cell, third cell) that are stacked and summed. Each cell contributes to the overall reference voltage while its noise contributions are uncorrelated, allowing the total noise to sum in an RMS fashion rather than linearly. This segmentation enables the circuit to maintain zero temperature coefficient while significantly reducing the overall noise level.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple ΔVBE cells are combined in a stacked configuration where their output voltages are summed together. The patent specifically merges the outputs of three ΔVBE cells with a VBE voltage to generate the final reference voltage. This combining approach maintains the zero temperature coefficient property while reducing noise through the statistical averaging effect of summing uncorrelated noise sources.

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If stacked ΔVBE cells are used to reduce noise, then 1/f noise is reduced, but the circuit complexity increases

Engineering Contradiction:
Improve1/f noise reductionVSAvoidcircuit structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The circuit is segmented into modular ΔVBE cells that can be stacked. Each cell is a self-contained unit with standardized components (BJTs, current sources, resistors), making the overall circuit structured and manageable despite the increased number of components. The modular nature allows for systematic design and analysis.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the operational parameters by using multiple ΔVBE cells with different emitter area ratios (N1, N2, N3) to achieve the desired reference voltage level and temperature coefficient while managing noise. By carefully selecting these parameters, the circuit achieves ultra-low noise without requiring an excessive number of cells.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a significant reduction in 1/f noise and mismatch, making it suitable for applications requiring low noise levels, such as electrocardiograph medical devices.

Implementation Method 1

the emitter areas of Q1 and Q2 are intentionally made different, such that the base-emitter voltages for the two transistors are different. This difference, ΔVBE, is a PTAT voltage

Methodology Applied
Scientific EffectBase-emitter voltage difference (ΔVBE) effect:

Implementation Method 2

The plurality of ΔVBE cells are stacked such that their ΔVBE voltages are summed. The noise of each ΔVBE cell is uncorrelated with the others; thus, the noise contributions to the PTAT voltage, vn,PTAT, sum in an RMS fashion

Methodology Applied
Scientific EffectVoltage summation effect:

Implementation Method 3

the base-emitter voltage (VBE) of Q1, which is a CTAT voltage, is summed with the PTAT voltage to generate reference voltage VREF, which has a first-order zero TC

Methodology Applied
Scientific EffectTemperature coefficient compensation effect:

Data Source

PatentUS9285820B2Ultra-low noise voltage reference circuit
Publication Date: 2016.03.15 ANALOG DEVICES INC
  • US9285820B2 patent drawing
  • US9285820B2 patent drawing
  • US9285820B2 patent drawing

AI summary

A voltage reference circuit comprises a plurality of ΔVBE cells, each comprising four bipolar junction transistors (BJTs) connected in a cross-quad configuration and arranged to generate a ΔVBE voltage. The plurality of ΔVBE cells are stacked such that their ΔVBE voltages are summed. A last stage is coupled to the summed ΔVBE voltages and arranged to generate one or more VBE voltages which are summed with the ΔVBE voltages to provide a reference voltage. This arrangement serves to cancel out first-order noise and mismatch associated with the two current sources present in each ΔVBE cell, such that the voltage reference circuit provides ultra-low 1/f noise in the bandgap voltage output.