Cross-Scribe Conductive Lines for Multi-Die IC Connectivity
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Solution Overview
Problem
Conventional semiconductor processing techniques, such as e-beam lithography, are limited in their ability to form conductive lines across multiple dies on a wafer, as they are typically localized and do not extend over scribe lines, which can hinder the creation of high-performance computing devices that require continuous electrical connectivity between adjacent dies.
Innovation Solution
The use of multi-beam e-beam lithography to pattern conductive lines that extend across multiple dies and over scribe lines, enabling continuous electrical connectivity between metallization stacks on adjacent areas of a substrate, thereby facilitating the formation of high-performance computing devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional localized e-beam lithography is used, then manufacturing precision is maintained within individual dies, but electrical connectivity cannot be achieved across scribe lines between adjacent dies
Solution Approach 1:
The patent combines multiple e-beam lithography beams into a unified patterning system that simultaneously patterns conductive lines across multiple dies and over scribe lines. This merging of localized beams into a coordinated multi-beam system enables continuous electrical connectivity while maintaining manufacturing precision through unified control of the lithography process.
Solution Approach 2:
The e-beam lithography system is enhanced to perform multiple functions: it patterns individual dies separately and simultaneously patterns continuous conductive lines across die boundaries. This multi-functional capability allows the same lithography system to achieve both localized precision patterning and extended connectivity patterning without requiring separate processing steps.
2Reliability
If conductive lines are extended across multiple dies, then electrical connectivity between adjacent dies is achieved, but conventional localized lithography methods become insufficient
Solution Approach 1:
The lithography system transitions from static localized patterning to dynamic multi-beam coordinated patterning. The system dynamically adjusts beam positions, intensities, and synchronization to pattern continuous conductive lines across moving or fixed multiple dies, enabling extended connectivity while maintaining ease of manufacture through adaptive control mechanisms.
Solution Approach 2:
The patent introduces an intermediary control system that coordinates multiple e-beam lithography beams and manages the complex patterning process across die boundaries. This intermediary control layer simplifies the manufacturing process by automatically managing beam synchronization, positioning, and parameter adjustment, making the extended connectivity patterning as easy to manufacture as conventional localized patterning.
3Quantity of substance
If feature scaling continues to increase device density, then capacity increases, but interconnect performance optimization becomes increasingly significant and difficult
Solution Approach 1:
The patent extends the lithography patterning from the two-dimensional plane of individual dies into the third dimension of wafer-level connectivity by patterning conductive lines that traverse scribe lines between adjacent dies. This dimensional extension enables interconnect performance optimization by creating continuous electrical pathways that span multiple devices, thereby managing the complexity of high-density interconnections through spatial extension rather than increasing intra-die density alone.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the creation of continuous conductive lines over scribe lines, enhancing electrical connectivity and supporting the integration of high-performance computing applications by overcoming the limitations of conventional localized e-beam lithography.
Implementation Method 1
multi-beam e-beam lithography to pattern conductive lines
Data Source
AI summary
An example IC device includes a substrate comprising a plurality of areas and one or more scribe lines defining boundaries of individual areas of the plurality of areas. The plurality of areas includes a first area and a second area. The IC device further includes a scribe line between the first area and the second area, a first device layer over the first area of the substrate and a first metallization stack over the first device layer, a second device layer over the second area of the substrate and a second metallization stack over the second device layer, and a conductive line extending (e.g., being materially and electrically continuous) between the first metallization stack and the second metallization stack, where a projection of the conductive line onto a plane parallel to the substrate and containing the scribe line intersects the scribe line.