Cross-Seam Metallization Routing Across Stitched Reticle Fields
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Solution Overview
Problem
Current lithographic techniques face challenges in stitching multiple reticle fields due to registration error and distortion, limiting the fabrication of larger dies and interposers with complex features, which are necessary for advanced electronics systems.
Innovation Solution
Implementing a semiconductor design that includes cross-seam line features, a test structure, and a seal ring to facilitate active interconnect routing across multiple reticle fields, using reticle stitching to create co-planar metallization features that span lithographic seams and include a test structure to verify their integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If reticle stitching is used to fabricate larger dies and interposers with multiple lithographic fields, then the size and complexity of the device is improved, but registration error and distortion increase
Solution Approach 1:
The patent applies preliminary action by pre-defining seam wire patterns and test patterns during the design phase that will be used for alignment and registration during the stitching process. Fiducial markers are pre-placed at field boundaries to enable accurate registration before actual stitching occurs, compensating for the inherent registration errors in multi-field fabrication.
Solution Approach 2:
The patent uses seam wires and fiducial markers as intermediary elements that facilitate the stitching process. These intermediary features are specifically designed to bridge adjacent fields, providing reference points for alignment and enabling the lithography system to accurately register and stitch multiple fields together despite distortion and registration errors.
2Area of stationary object
If reticle stitching is used to create metallization features across multiple fields, then the area and connectivity are improved, but distortion and alignment accuracy deteriorate
Solution Approach 1:
The patent implements preliminary action by pre-designing and pre-positioning fiducial markers and seam wire patterns at expected field boundaries before the stitching process. These pre-defined features serve as reference points that enable accurate alignment and distortion compensation during the actual stitching operation, maintaining measurement precision across larger metallization areas.
Solution Approach 2:
The patent employs feedback mechanisms through test patterns and seam wires that are exposed alongside the main metallization features. These test features provide real-time feedback on alignment accuracy and distortion, allowing the system to measure and compensate for registration errors, thereby maintaining high alignment accuracy across expanded metallization areas.
3Adaptability or versatility
If multiple lithographic fields are stitched together to form larger dies, then the device capability is improved, but fabrication difficulty increases
Solution Approach 1:
The patent applies segmentation by dividing the large die into multiple manageable lithographic fields that can be fabricated separately and then stitched together. Each field can be designed and optimized independently, reducing the complexity of individual lithography steps while achieving the overall capability of a large, complex device through the stitching of these segmented fields.
Solution Approach 2:
The patent uses seam wires and test patterns as intermediary elements that simplify the fabrication process. These intermediaries provide built-in alignment references and test structures that automate the stitching process, reducing the manual complexity and difficulty of fabricating multi-field devices while enabling greater device capability.
4Reliability
If seam wires are used to interconnect metallization regions across seams, then the electrical connectivity is improved, but the complexity of the lithographic pattern increases
Solution Approach 1:
The patent applies universality by designing seam wires that serve multiple functions simultaneously: they provide electrical interconnection across field boundaries, serve as alignment references for stitching, and act as test structures for verifying connectivity. This multi-functionality reduces the need for separate dedicated features, thereby improving electrical connectivity without proportionally increasing lithographic pattern complexity.
Solution Approach 2:
The patent merges the functions of interconnection, alignment, and testing into unified seam wire structures. By combining these functions into single integrated features rather than separate elements, the patent achieves reliable electrical connectivity across seams while minimizing the additional complexity introduced to the lithographic pattern.
Data Source
AI summary
Integrated circuit dies, interposers, systems, and methods are described related to implementing seams between fields exposed using different lithographic exposures. First and second metallization stack regions or fields each implement signal and/or power routing and are separated by a seam therebetween. The seam includes conductive features that span the seam and interconnect the metallization stack regions. A test feature surrounds the metallization stack regions and includes metallization portions that also span the seams. The test feature is within a seal ring and, through electrical testing, validates the conductive features that span the seam.