Crossbar Arithmetic Processor for Parallel Large-Number Computation
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Solution Overview
Problem
Conventional arithmetic logic units face limitations in performing large-scale arithmetic operations efficiently, particularly with multiplication, division, and factorization, due to sequential processing which becomes time-consuming for large numbers.
Innovation Solution
A crossbar arithmetic processor is developed, combining a crossbar array with programming, input, and post-processing units to perform arithmetic operations by controlling current flow and converting analog signals to digital outputs, enabling parallel processing of large numbers through a modified crossbar array with rectification layers and programmable resistance states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional arithmetic logic units are used for large-scale arithmetic operations, then the processing can be performed with standard architecture, but the processing time becomes excessively long due to sequential processing
Solution Approach 1:
The patent replaces conventional sequential electronic logic circuitry with a molecular-scale crossbar array system. Molecular components (such as DNA strands or molecular switches) are used to perform arithmetic operations through chemical or molecular interactions rather than traditional electronic signal processing, enabling parallel computation at molecular scales
Solution Approach 2:
The invention transitions from two-dimensional planar circuit layouts to three-dimensional vertical stacking of crossbar arrays. Multiple computational layers are stacked vertically with interconnect structures, allowing simultaneous operations across multiple layers and dramatically increasing computational throughput while maintaining compact form factor
2Volume of moving object
If molecular components are used in crossbar arrays, then the device size can be reduced to nanometer scales, but the control and manipulation of molecular states becomes more difficult
Solution Approach 1:
The patent introduces intermediary control structures between the molecular crossbar components and external control systems. These intermediaries (such as voltage pulse generation circuits, temperature control mechanisms, or chemical delivery systems) translate macroscopic control signals into the specific molecular-scale stimuli needed to manipulate molecular states, making molecular components controllable with conventional equipment
Solution Approach 2:
The molecular components are designed to perform self-assembly and self-organization, reducing the need for precise external manipulation. Molecular structures automatically form the required crossbar configurations through spontaneous assembly processes, and molecular switches automatically transition between states in response to simple stimulus signals, eliminating the need for complex external control mechanisms
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The crossbar arithmetic processor achieves efficient processing of large numbers and complex operations like multiplication and division, potentially surpassing conventional processor speeds by performing operations in parallel without incremental addition steps, and is suitable for molecular scale electronics.
Implementation Method 1
The crossbar array is preferably modified to include rectification layers that control the current flow direction between layers of the crossbar array
Implementation Method 2
A property of the material, such as the material's resistance, may be altered by controlling the voltages applied between individual wires from the first and second set of wires. Alteration of the materials resistance at an intersection may be performed so as to achieve a high resistance or low resistance state and thus store digital data
Data Source
AI summary
A processor includes a crossbar array including row wires and column wires wherein bit patterns representative of numerical values are stored in a plurality of columns of the crossbar array in the form of high or low resistance states. An output unit electrically connected to the rows of the crossbar array is configured to sum the numerical values stored in the columns of the crossbar array.